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Yorchip Inc

Yorchip Inc is at the forefront of semiconductor innovation, pioneering the use of chiplet technology to revolutionize ASIC development. Traditionally, designing application-specific integrated circuits (ASICs) has been an expensive endeavor, with non-recurring engineering (NRE) costs climbing into millions of dollars. Yorchip addresses this challenge by creating reusable micro chiplets for common IPs like CPU, Ethernet, PCIe, and Memory, effectively reducing costs for their clients by approximately $4-5 million. This approach not only lowers expenses but also mitigates lead times and project risks, making advanced technology more accessible and efficient. The company has introduced its patented Universal PHY™ technology, designed to make chiplet-based solutions more affordable and with lower power consumption and latency. Unlike current chiplet technologies, which are often confined to the high-performance computing and data center markets due to prohibitive costs and limited node availability, Yorchip's Universal PHY™ opens the possibility for broader market adoption. Their approach aims to offer unit costs comparable to those of standard ASICs, enhancing the viability of chiplets across various sectors. Yorchip's innovations promise a significant shift in how semiconductor devices are developed and deployed. The company's cutting-edge Universal PHY™ technology makes the distribution and mass adoption of chiplets economically feasible. Set to be detailed at an upcoming Chiplet Summit, this technology underscores Yorchip’s commitment to pushing the boundaries of what's possible in ASIC development and providing scalable, cost-effective solutions to meet the evolving demands of the technology industry. Read more

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Universal PHY Technology

Yorchip's Universal PHY Technology is a groundbreaking innovation aimed at reducing the cost and complexity of deploying chiplets across various industries. Unlike traditional PHY technologies, which are often limited to specific markets such as high-performance computing and data centers, Yorchip's Universal PHY offers a cost-efficient and scalable alternative. The technology is designed to be compatible with a wide range of process nodes, making it viable for mass-market applications. The Universal PHY reduces both power consumption and latency, matching the unit cost of chiplet ASICs with that of standard ASIC solutions. This makes it an attractive option for companies looking to leverage the benefits of chiplet technology without facing prohibitive costs and limited node availability. Scheduled for further disclosure at the Chiplet Summit in January 2025, the Universal PHY is poised to become a cornerstone in next-generation chip design. It promises to offer the flexibility and efficiency needed for widespread adoption, driving significant advancements in semiconductor IP deployment on a global scale.

Yorchip Inc
Multi-Protocol PHY
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