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The 802.11 LDPC solution by Wasiela is designed to offer high throughput with on-the-fly frame-to-frame configuration. It allows for flexible LDPC decoding iterations, balancing throughput with error correction performance according to specific requirements. This ensures optimal bit-error-rate and packet-error-rate performance, crucial for maintaining the integrity of wireless communications. With specifications aligning perfectly with industry standards, this product is vital for delivering reliable and efficient connectivity.
The LTE Lite solution is a versatile PHY product tailored to support a wide range of channel bandwidths and modulation schemes. Compliant with CAT 0/1 PHY specifications, it offers features such as IF input support, time tracking, and frequency correction for enhanced communication clarity and reliability. Designed for synthesizable Verilog-2001, the system integrates easily with external tuners and ADCs, making it a foundational component in efficient LTE communication setups.
Wasiela's DVB-S2-LDPC-BCH is engineered to deliver robust forward error correction (FEC) essential for digital video broadcasting, particularly over satellite applications. It efficiently combines LDPC and BCH codes to offer near error-free operation, closely approaching the Shannon limit. This capability ensures high-quality, reliable broadcast signals, even in challenging conditions, adhering to ETSI EN 302 307-1 standards.
The Bit Chains offered by Wasiela provide robust LTE and DVB-T2 radio chains that handle varying bandwidths and modulation spectra with ease. Capable of supporting multiple standard configurations, these chains facilitate seamless data reception and processing, enhancing signal integrity and communication reliability. Designed to be adaptable, Bit Chains are integral to the efficient management of diverse communication protocols and data flows.
The DSP Cores from Wasiela are designed to enhance digital signal processing tasks with high efficiency and configurability. Key components include fully pipelined CORDIC engines and iterative FFT blocks, capable of supporting a broad range of sizes and standards like 3GPP LTE and WiMax. These cores enable powerful computational abilities, suited for OFDM standards and other complex signal processing requirements.
Wasiela's Diversity IP features advanced MIMO decoding capabilities, focusing on close-to-Maximum-Likelihood (ML) Bit Error Rate (BER) performance. Utilizing fixed depth K-Best decoders, Wasiela's solution supports various MIMO configurations, offering high reliability for multisream communication scenarios. The inclusion of QR Decomposition and the ability to adjust for different quadrature amplitude modulation levels makes it an invaluable asset for robust signal processing applications.
The AES IP Core by Wasiela provides a comprehensive encryption and decryption solution, supporting key lengths of 128, 192, and 256 bits. This high-performance core is engineered to handle various input patterns securely, meeting the rigorous demands of modern cryptographic applications. With its robust architecture, it offers a powerful tool for securing data against unauthorized access and tampering.
Wasiela presents ASIPs—Application Specific Instruction Set Processors—as customizable hardware accelerators designed for tailored performance in specific applications. These processors combine specialized instruction sets with low-power operation to enhance the efficiency and flexibility of digital processing tasks. ASIPs from Wasiela provide significant benefits in environments where task-specific adaptations are crucial for optimal performance.
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