Is this your business? Claim it to manage your IP and profile
VISENGI’s JPEG Decoder IP core is a hardware-oriented solution for decoding JPEG images and MJPEG streams effectively. With a focus on maintaining compatibility with varied image sources, the decoder operates up to 4 pixels output every three cycles, thereby facilitating rapid processing speeds necessary for real-time multimedia applications. The decoder supports the full range of JPEG formats, including multi-scan JPEGs and unlimited chroma subsampling, accommodating extensive image characteristics. Moreover, it provides capabilities for both YCbCr and RGB output, catering to diverse multimedia display requirements. Its high-speed operation is supported by a dual pixel component pipeline and an optimized Huffman decoder, which ensure that decoding efficiency is maintained even for images saved with the highest quality settings. Ideal for integration in environments requiring seamless JPEG decompression, the decoder also offers full support via standard AXI interfaces, making it the perfect choice for stringent time-to-market solutions.
VISENGI’s JPEG Extended Encoder IP core is a comprehensive solution for extended and baseline DCT compression. It adheres strictly to the JPEG ITU-T T.81 standard and accommodates a variety of image qualities through flexible compression settings. The encoder is capable of processing color pixels at a high throughput of 5.3 pixels per cycle, making it efficient and reliable for high-volume image processing applications. The encoder is designed with modularity and versatility in mind, supporting inputs from RGB and YCbCr sources and providing flexible chroma subsampling options. These features make it suitable for a wide range of applications, from simple image compression tasks to more complex multimedia processing. Furthermore, the IP core integrates seamlessly into various design environments with drag-and-drop capabilities for both Xilinx Vivado and Intel Quartus platforms. It comes with embedded DMA engines that connect directly to memory controllers, enhancing performance with efficient data transfer capabilities. The encoder also includes optional AXI4-Stream interfaces, ensuring compatibility with diverse hardware setups.
VISENGI’s H.264 Decoder IP core is designed to complement their H.264 Encoder, ensuring optimal performance and compatibility. It supports multiple profiles including the High 4:4:4 Predictive Profile, which matches the encoding specifications. The decoder achieves a high throughput and maintains low latency, keeping up with the high performance of the encoder. The architecture is scalable, allowing for multiple stream decoding in parallel, which offers flexibility in balancing size, latency, and pixel throughput. The core is not a general-purpose decoder but is crafted to work seamlessly with VISENGI's specific encoder profiles, enhancing performance and reducing latency substantially. With embedded DMA engines for direct memory connections and support for high-latency memories, the interface design is aligned with industry standards, notably the AXI interfaces. The inclusion of motion compensation capabilities further improves efficiency, especially when used in conjunction with VISENGI's advanced encoder variants.
The H.264 Encoder by VISENGI is a cutting-edge solution designed to deliver top-notch video compression. It boasts the highest pixel throughput in the industry, enabling UltraHD 4K 60 capabilities on low-range FPGAs and even 8K 30 on mid-range FPGAs like Arria 10 and Zynq. This encoder uses a unique single-engine design to maintain minimal latency, outperforming multi-engine alternatives. There are two variants available: H264E-I, a compact version for applications requiring minimal external memory and lighter compression, and H264E-P, which provides superior compression for more substantial needs. Both versions ensure a processing speed of over 5.2 pixels encoded per cycle, demonstrating high efficiency and throughput across various resolution demands. Another highlight is its versatile resolution support, allowing for continuous adaptation from low to high resolutions—ranging from QVGA to 8K—within the same IP core. This flexibility coupled with comprehensive real-time control options makes it ideal for dynamic and demanding scenarios. Designed for straightforward integration, the encoder uses AXI interfaces and supports a wide range of I/O configurations enhancing its adaptability in multiple environments.
The JPEG Encoder from VISENGI is engineered for efficient baseline DCT compression, aligning with the JPEG ITU-T T.81 standard. It offers a robust hardware solution with constant throughput, making it ideal for applications requiring high-speed image processing and compression. Facilitating integration into existing systems, this IP core supports drag-and-drop functionality for leading design tools like Xilinx Vivado and Altera Quartus. It handles 16 compressed color pixels every three cycles, ensuring rapid performance even under demanding conditions, and up to 8 pixels per cycle for grayscale images. In addition to supporting various chroma subsampling methods and quality levels, the encoder optimizes performance through its AXI standard interfaces, allowing seamless communication between input/output channels and memory controllers. Thus, it adapts to a range of resolutions and input formats, providing extensive flexibility and customization options for developers dealing with both static and dynamic image data.
VISENGI's 2D DCT Core provides efficient two-dimensional discrete cosine transform capabilities, crucial for a variety of data compression processes including image and video compression. This core boasts a fully parallelized design with pipelining, enabling high-throughput processing suitable for real-time applications. Operating over 8x8 blocks of pixels, the 2D DCT Core efficiently transforms spatial data into frequency components, which are easier to compress. The modular design supports different input/output bit widths and the capability to run multiple operations concurrently, allowing adaptation based on specific application needs. This versatility is underscored by its efficient use of resources, making it suitable for deployment in FPGAs or ASICs with varying capacity. Seamlessly integrating into systems that require robust image and video processing capabilities, the core's customizable parameters ensure broad applicability and consistent performance.
The PNG Encoder IP core by VISENGI is meticulously crafted to perform lossless image compression using the PNG standard. It implements both ZLIB and Deflate techniques to deliver efficient, high-quality image compression while maintaining the original pixel integrity. This core handles 24-bit True Color and 8/16-bit grayscale images, adapting to varying data widths efficiently. Its real-time throughput of one pixel per clock cycle allows it to process images rapidly, making it ideal for systems that prioritize speed without sacrificing data fidelity. VISENGI's PNG Encoder facilitates integration into existing workflows through straightforward FIFO-style interfaces and minimal control requirements, ensuring simplicity and reliability. The flexibility of headerless operation for specific applications adds to its utility, making it suitable for diverse media and archival requirements.
VISENGI offers a robust Bayer To RGB Converter IP core designed to convert raw sensor data into standard RGB images efficiently. This IP core uses bilinear interpolation to process each Bayer pixel, handling edge cases seamlessly to generate high-fidelity images. The converter supports configurable pixel sizes and types, accommodating a wide range of sensor outputs. It is engineered to deliver a throughput of one RGB pixel per cycle, enhancing image processing speeds significantly, making it suitable for high-speed camera applications and other real-time processing tasks. Additionally, user-defined settings allow adjustments to the output bit-width and sensor signaling on-the-fly, adding flexibility especially in dynamic environments. This, combined with its dual clock domain design, ensures compatibility and optimized performance across various systems, from simple setups to complex, high-end applications.
VISENGI’s PNG Decoder IP core delivers a seamless hardware-based solution for lossless decompression of PNG images. Adhering to the ISO/IEC 15948:2003 standard, it utilizes ZLIB and Deflate algorithms to accurately restore compressed image data into viewable formats. Capable of managing True Color and grayscale images at varying bit depths, the decoder's performance is optimized to achieve up to 1 pixel decoded per cycle in best-case scenarios. This ensures that systems requiring swift image decompression can rely on its consistent speed without data loss. The PNG Decoder also integrates easily into various systems due to its FIFO-like interfaces that simplify data handling. It provides robust error-checking mechanisms, which are crucial for maintaining the integrity of the decoded output. This makes it an indispensable tool in media processing applications needing reliable and efficient image manipulation.
Join the world's most advanced semiconductor IP marketplace!
It's free, and you'll get all the tools you need to discover IP, meet vendors and manage your IP workflow!
To evaluate IP you need to be logged into a buyer profile. Select a profile below, or create a new buyer profile for your company.
