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Tiempo Secure's PSA Compliant Crypto API is tailored to offer a modular and user-friendly interface for executing secure cryptographic operations. This API simplifies complex cryptographic tasks, delivering a compact yet versatile library that consumes minimal on-chip resources. By adhering to PSA Certification standards, it ensures that embedded systems maintain high levels of security with easily integrable cryptographic functionalities. The API includes efficient programming interfaces designed for cross-platform use, making it an ideal choice for developers seeking secure and compliant cryptographic solutions. By offering SRAM-based PUF key storage and a NIST SP-800 90A compliant DRBG with 256-bit security, it addresses the spectrum of security requirements while providing a reliable source of randomness for secure operations. This Crypto API stands out due to its optimized SHA-256 implementation and comprehensive logging features, aiding developers in building security measures without extensive overheads. Its portability across different environments further enhances its utility, making the PSA Compliant Crypto API a cornerstone for embedding security into a wide variety of digital applications.
The SHA-3 Crypto Engine from Tiempo Secure is engineered to deliver advanced hash functions required for modern cryptographic applications. This IP core is recognized for its high throughput and flexible configuration options, allowing it to meet diverse hashing requirements efficiently. By supporting all SHA-3 standard functions and offering extended output functionality, the engine provides robust solutions for data integrity and authentication. With its innovative 1 cycle per round processing, the SHA-3 Crypto Engine ensures rapid performance, optimizing the silicon resource use in a given application. Users can tailor the engine through software to specify the rate and number of rounds per operation, making it adaptable for various requirements. This flexibility in configuration meets the specific needs of each cryptographic task, allowing for effective scalability and integration within digital frameworks. The inclusion of acceleration for the Kangaroo Twelve algorithm and compatibility with a range of message lengths further expands its utility. This makes the SHA-3 Crypto Engine an effective tool for secure communications, providing enhanced resilience and speed in cryptographic procedures. Developers seeking to implement efficient and reliable security measures will find this engine instrumental in building secure systems.
Tiempo Secure's Post-Quantum Cryptography (PQC) solutions are geared towards securing sensitive data against the threats posed by quantum computing. Recognizing the need for a forward-looking approach to cryptography, these solutions incorporate cutting-edge algorithms designed to withstand quantum-level attacks. They provide comprehensive quantum-resistant features, including code signatures and key encapsulation. The PQC solutions utilize the LMS Code Signature and Crystals-Dilithium algorithms, ensuring robust digital signatures and secure code signing. These algorithms are part of NIST’s post-quantum cryptography standardization efforts, ensuring future-proof security in face of quantum challenges. Additionally, the Crystals-Kyber Key Encapsulation Mechanism offers a secure, hardware-accelerated method for protecting cryptographic keys, making it ideal for maintaining secure data transmission. These PQC solutions cater to the need for adaptable security strategies in a rapidly advancing technological landscape. Suitable for a variety of applications, including secure communications and network infrastructures, they are designed to integrate seamlessly into existing security frameworks, offering enhanced resilience and comprehensive protection for future generations of digital security needs.
Secure Boot is a critical feature for ensuring the integrity of firmware in connected devices, preventing unauthorized and potentially harmful firmware modifications. The implementation relies on the Post-Quantum Secure LMS algorithm, as standardized by NIST, which provides a robust defense against threats even in the age of quantum computing. By enforcing a verified boot process from authenticated firmware, Secure Boot not only uplifts the security posture but also facilitates secure firmware updates. This IP is highly adaptable, allowing up to 32K firmware updates with a lightweight signature footprint of just 2.8 KBytes, vital for systems where storage efficiency is a priority. Additionally, it incorporates anti-roll-back protections, ensuring that once updated, the firmware cannot be downgraded to a vulnerable version. Encompassing extensive logging functionalities, Secure Boot aids in audit trails and troubleshooting, offering an expansive configurability to fit various device architectures. Developed using portable C code with assembly optimizations for selected CPUs, Secure Boot is compliant with MISRA C standards, ensuring high reliability and safety. Its cross-platform nature includes an optional AES-CTR encryption feature, broadening its utility across various embedded environments. The inclusion of a cross-platform signing tool further simplifies its integration into diverse system architectures, making Secure Boot an excellent choice for maintaining the security and trustworthiness of complex systems.
The True Random Number Generator (TRNG) IP by Tiempo Secure is a cornerstone for cryptographic applications, providing a digital source of randomness crucial for secure operations. Designed specifically for System on Chip (SoC) applications, TRNG ensures that cryptoprocesses such as key generation and encryption are rooted in true randomness. Meeting stringent standards, it complies with NIST-800-22, NIST-800-90B, and AIS31, establishing its credibility and robustness in ensuring data security. True randomness is vital for secure device operation, and TRNG provides this by offering a foundation for tasks such as digital signatures, key exchange, and secure communication protocols. Its compatibility with APB and AXI buses enhances its integration potential, allowing seamless incorporation into various existing systems. The extensive validation under FIPS-140-3 certification further underscores the reliability and trustworthiness of this security solution. Moreover, the TRNG is engineered to fit easily into secure protocol implementations, catering to needs in IPsec, MACsec, TLS/SSL, and more. By ensuring random number generation maintains high integrity, it supports not just current encryption methods but is also adaptable for future use cases, promising longevity in its application across evolving technological landscapes.
Tiempo Secure's SHA-2 Crypto Engine is designed to facilitate robust cryptographic hashing, necessary for ensuring data integrity and authenticity across varied applications. With support for SHA-256 and SHA-224, this crypto engine offers a flexible approach to implementing cryptographic security. It ensures swift processing with its 1 cycle per round architecture, making it suitable for environments where performance and speed are of the essence. The ability to manage SHA-256 state import and export, alongside granular message length support, makes the SHA-2 Crypto Engine versatile in its application. It seamlessly fits into existing systems via its APB and AXI bus compatibility, enhancing its utility across different platforms. This modularity and adaptability make it stand out, catering to the needs of developers looking to embed reliable cryptographic functionalities without excessive overhead. Internally, the engine manages padding, accommodating both pre-padded and raw message payloads, which simplifies integration into secure communication workflows. The SHA-2 Crypto Engine is an ideal choice for systems requiring cryptographic resilience, offering a turnkey solution that balances performance and security. Its design supports the development of secure devices in IoT, automotive, and other sectors where data security cannot be compromised.
TESIC Secure Enclave IP is an advanced security solution designed to meet the growing demands for secure electronic identities and communication across connected devices. With an emphasis on robust protection, this secure enclave serves as a Hardware Secure Module and a Root of Trust, essential for safeguarding sensitive operations conducted by Systems on Chip (SoC) and ASICs. The TESIC Secure Enclave caters to multiple application segments, including IoT, automotive, and cellular communication. Providing a comprehensive security sub-system, it fends off both physical and logical attacks, ensuring the integrity and confidentiality of data and processes. One of its standout features is the integration of Post Quantum Cryptography, a forward-thinking addition that addresses upcoming security challenges in a quantum computing world. The enclave is customizable, making it adaptable to specific client requirements. Each product includes functional blocks like Secure Boot and PSA Crypto APIs, ensuring scalable and seamless integration into various designs. Further enhancing its utility, the TESIC Secure Enclave IP is pre-certified, enabling rapid certification of entire platforms to industry standards like SESIP and Common Criteria EAL5+. Such certifications underpin its reliability and assure developers of its robustness. Additionally, the flexibility it offers makes it a fitting solution for a range of certifications, including those necessary for automotive SoC designs under ISO 26262 standards. It's a future-proof platform that adapts and meets the evolving security landscape, efficiently pairing top security features with proven performance.
Tiempo Secure's True Random Number Generator (TRNG) is a critical component in the realm of secure device operations, providing an unpredictable source for cryptographic protocols. Such true randomness is foundational in developing secure communication and data protection strategies. This TRNG stands out because of its thorough compliance with various stringent standards, including those from NIST and AIS, resulting in sound security support for various SoC applications. In systems where security is paramount, the role of a TRNG extends to generating secure keys, random nonces for secure exchanges, and random data for digital signatures. The inclusion of raw data access and comprehensive health tests, compliant with SP800-90b, FIPS140-3, and AIS31, ensures the highest levels of reliability and security for sensitive operations. This IP includes integration options for standard bus protocols like APB and AXI, making it adaptable to a range of system-on-chip architectures. The TRNG is thus not only a standalone solution but a seamless integrating component which elevates the overall security fidelity of cryptographic systems, offering robust random number generation that aligns with both current and emerging digital security needs.
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