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Operating as a low-power, single-bit switched capacitor Sigma-Delta modulator, this device suits the needs for Nyquist-rate conversions ranging from 7.8125kHz to 62.5kHz. Its robust design using TSMC 180nm technology, offers 13-bit performance, crucial for sensor interfaces and IoT systems. Its efficient power use and compact 0.15 sq-mm area make it a strategic choice for fine-line instrumentation applications, catering to precise conformance and data accuracy in demanding environments. With silicon proven readiness, integration is seamless for developers.
A variant tailored for IQ operations, this DAC extends the abilities of digitally-assisted current conversion to IQ applications at 320MSps and 12-bit resolution. Suitable for TSMC 40nm CMOS technology, it occupies 0.12 sq-mm and has a power consumption of 16 mA, demonstrating its capacity for handling complex data streams with precision. This GDSII-ready solution effectively serves communications and advanced signal processing, offering ease of design integration and robust performance metrics.
Combining multiple essential functions for integrated circuit design, this AFE includes a 12-bit IQ ADC, IQ DAC, and a clock-PLL. Optimized for TSMC 40nm fabrication, it provides comprehensive solutions in space-constrained environments, occupying 0.24 sq-mm while emphasizing power efficiency with a consumption of 25 mA. Considered GDSII-ready, this multipurpose component is ideal for circuits needing joint data conversion and precise clock management, particularly beneficial in signal processing and communications systems.
This ADC is a 1.8V low-power single-bit switched-capacitor Sigma-Delta modulator-based device, designed for frequencies from 7.8125kHz to 62.5kHz at the Nyquist rate, with programmable decimation rate. Implemented on TSMC's 180nm low-power technology, it excels in applications such as wireless/wireline sensor interfaces and IoT devices, offering 13-bit performance. Its small form factor and power efficiency make it ideal for modern, compact, high-performance systems requiring precise data transference and management.
This clock-PLL offers robust performance from 16MHz to 2GHz, incorporating three programmable outputs. Utilizing TSMC 40nm technology, its design focuses on power efficiency and space economy, occupying only 0.04 sq-mm while operating at 3 mA. Its GDSII readiness positions it for immediate deployment in clock synthesis for digital systems, where precision and multiple clock domain management are required. Ideal for applications necessitating flexible clock generation solutions with high stability and low jitter.
This programmable low-noise 0.55V Band-Gap Reference is developed using TSMC 40nm technology, focusing on providing stable voltage with minimal noise interference. Its small area of 0.03 sq-mm and consumption of 0.5 mA makes it suitable for portable devices and systems where energy efficiency is critical. This GDSII-ready component underscores Tetrivis's commitment to creating components that enhance circuit reliability and performance.
Designed as a robust solution for high-quality analog-to-digital conversion, this 12-bit Sigma-Delta IQ ADC spans frequencies from 64MHz to 340MHz and is built on Global Foundries' 40nm technology. Its operation centers around an oversampling ratio of 32, leading to exceptional noise shaping and resolution. Suitable for both RF and baseband applications, this ADC's performance characteristics make it a standout choice in high-fidelity audio and precise measurement systems. Its silicon-proven status ensures reliability and performance consistency.
Engineered for high-speed digital-to-analog conversion, this 12-bit DAC operates at 320MSps, incorporating digitally assisted current techniques to enhance performance. Created for TSMC 40nm processes, this DAC balances the need for high frequency operation with power efficiency, occupying just 0.06 sq-mm and consuming 8 mA. It's a GDSII-ready IP core, perfect for communication systems and applications demanding high-speed and precise DAC operations, ensuring swift integration and reliable performance.
This is a 12-bit, 80MSps Asynchronous-SAR ADC designed for high-speed and efficient analog-to-digital conversion, suitable for TSMC's 40nm CMOS technology. This ADC is tailored to meet the demands of applications requiring rapid data conversion, boasting a low power consumption of 3 mA. Its compact design, occupying only 0.04 square millimeters, makes it an ideal choice for modern electronic circuits where space and power efficiency are critical. The GDSII format is readily available, demonstrating its maturity and readiness for integration into larger systems.
Designed for high-frequency applications, this RF PLL operates from 6.0GHz to 9.4GHz, utilizing TSMC's 40nm low-power CMOS process. It integrates Buffered VCO outputs, focusing on minimizing phase noise and enhancing stability in frequency synthesis. Ideal for applications in telecommunications and advanced signal processing, it supports precise LO reference generation for up/down converters. The IP's GDSII readiness ensures it is a reliable and consistent component in RF infrastructure, promoting superior signal fidelity.
Crafted for high-frequency Ku-band applications, this phased array Rx frontend capitalizes on TSMC's 180nm RF processes. It emphasizes efficiency in receiving low-power signals across phased array systems, making it pivotal in modern communication infrastructure. This IP’s developmental status ensures it is adapting to the latest advancements in RF technologies, preparing it for dynamic and evolving requisites of the field. A focus on low-phase noise and streamlined integration makes it an attractive choice for RF communication standards like satellite and radar technologies.
Created for transmitting actions within Ku-band frequencies, this Tx Front End utilizes TSMC's 180nm RF process to handle the intricacies of phased array functionality. While still in development, it highlights forward-looking capabilities for transmit systems requiring adaptive and robust RF interfaces. Meeting the demands for precision in broadcast and telecommunications, it lays the groundwork for innovative implementations in emerging RF technologies, ensuring readiness for future signal transmission challenges.
This ADC variant expands on the asynchronous-SAR capabilities by integrating IQ functionality, essential for quadrature applications. It operates at 80MSps with a 12-bit resolution and is implemented in TSMC's 40nm technology. Though slightly larger, at 0.08 square millimeters, its capability to handle IQ data streams while consuming only 6 mA power makes it a solid performer in advanced communications and processing functions. It's GDSII-ready, ensuring that it fits seamlessly into existing design architectures.
This Fractional-N RF PLL offers operation from 2.0GHz to 4.7GHz with low-power, low-area design, tailored for TSMC 40nm technology. It features quadrature outputs, making it ideal for communication systems involving on-chip Quadrature Local Oscillators. Its low loop-filter bandwidth and phase-noise allows precise frequency synthesis, enhancing transmission and reception quality. With GDSII readiness, it integrates seamlessly into RF systems where high performance is essential for signal integrity.
Optimized for low-dropout operations, this programmable LDO delivers regulated output at 1.1V with a maximum 50mA current. Developed using TSMC 40nm processes, it affords a compact and power-conscious solution for applications requiring consistent voltage supply with minimal power wastage. The GDSII-ready status further suggests easy incorporation into systems desiring efficient power management solutions, aligning with size and energy conservation standards in electronic design.
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