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The High Channel Count DMA IP Core for PCI Express is engineered for high-throughput applications involving numerous data sources. It efficiently manages up to 64 data streams, storing them in separate host memory regions via DMA operations. With support for up to 8 AXI4 Master interfaces for user logic and capability to read data over DMA with 16 AXI Stream Masters, it facilitates the creation of sophisticated PCIe endpoints without requiring advanced PCI Express knowledge. Users transmit or receive only payload data, with the core automatically handling PCI Express packet generation. This capability, combined with compatibility for data streaming, Ethernet, and coprocessor applications, ensures swift development and integration into complex systems.
The AXI Bridge with DMA for PCIe is Smartlogic's premier PCIe DMA IP solution, providing an impressive blend of multiple standard-compliant AXI interfaces. It facilitates continuous data streaming between FPGA and host or vice versa through AXI Stream interfaces, and S-AXI Memory Mapped interfaces simplify remote memory access for shared or peer-to-peer applications. These interfaces operate concurrently without interference, with each unused interface capable of being disabled to save logical resources. Developers can create complex PCIe endpoints without deep PCIe protocol knowledge; users handle only payload data, while a robust kernel mode driver for Windows and Linux ensures easy software integration. This feature-rich IP core significantly eases the development of Ethernet applications and other high-performance data streaming tasks.
The Multi-Channel AXI DMA Engine bridges AXI Stream and AXI memory-mapped systems using a robust DMA engine. It can handle data from up to 16 AXI Stream Slave inputs concurrently, writing and reading from AXI memory-mapped spaces like DDR. With AXI Stream Master capabilities, it enables data retrieval and multi-stream processing by subsequent DSP units. Programmable address generators permit non-linear data writing, effectively easing future algorithmic processing tasks and sorting data for regions of interest. Common in SoC-based FPGA usages, it processes camera and A/D converter streams into SoC DDR, with GStreamer-compatible Linux driver support unlocking powerful open-source frameworks for video processing.
The Multi-Channel Flex DMA IP Core is tailored for streaming applications, capable of addressing up to 16 separate target memory locations simultaneously. Its channels operate independently and are unimpeded by each other, with adjustable clock rates for interfacing simplicity. Integrated parametric input FIFOs enable prioritization, ensuring critical data channels remain unblocked. Besides its notable streaming application prowess, the core is suitable for coprocessor roles, allowing DMA reads from any data source, processing, and new destination storage. Moreover, it offers continuous CRC error monitoring on PCI Express links, enhancing production testing by identifying boards with poor signal integrity, crucial for security-sensitive applications.
Smartlogic's AXI Bridge for PCIe is a powerful IP solution with up to four industry-standard AXI4 interfaces. It converts AXI4 read and write transactions into PCIe Transaction Layer Packets, supporting fully parallel operations without any interference. Interfaces not in use can be disabled, conserving logical resources. Users engage with only the payload data rather than assembling valid PCIe TLP packages, and the IP core comes with a high-performance kernel mode driver suitable for both Windows and Linux. This driver allows seamless software integration, proving beneficial for various Ethernet application scenarios and other relevant applications.
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