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Avispado is crafted as a 64-bit in-order RISC-V core that prioritizes efficiency and simplicity. Designed for energy-sensitive systems, it provides a balance between performance and power consumption, making it ideal for machine learning tasks where energy efficiency is paramount. Its 2-wide in-order pipeline smoothly manages instruction processing while maintaining low power usage. This core's architecture supports high-performance computing demands by allowing extensive customization, such as scalable instruction and data cache sizes and branch prediction tuning. Its integration with the Gazzillion Misses™ technology enhances its capacity to manage data with high sparsity, resulting in superior energy efficiency per operation. Its vector-ready design with the Vector Specification 1.0 provides flexibility in computational tasks, enhancing its workload handling capabilities. Avispado is equipped for multiprocessing environments with support for cache coherence, leveraging the CHI interface and customizable down to AXI. This flexibility makes Avispado a perfect component for building cost-efficient, high-performance SoCs tailored for specific machine learning applications, providing robust performance without excessive silicon footprint.
Atrevido is a versatile 64-bit RISC-V core engineered for out-of-order processing, offering significant customizability and performance efficiency. Targeting applications in machine learning and artificial intelligence, Atrevido is built to handle demanding workloads with ease. Its architecture allows for 2, 3, or 4-wide pipeline configurations, enhancing its ability to manage multiple processes simultaneously and efficiently. This core's strength lies in its ability to navigate complex computations with minimal latency, thanks to the integration of Gazzillion Misses™ technology. This feature maximizes memory bandwidth utilization, making the core particularly well-suited for environments with high data sparsity and long memory latencies. Its out-of-order execution capability is crucial for improving throughput in applications requiring rapid data processing, such as recommendation systems and high-performance computing tasks. Atrevido also supports the RISC-V Vector Specification 1.0, allowing for the integration of vector instructions that optimize tasks typically associated with AI workloads. This feature, combined with native support for cache-coherent multiprocessing, makes Atrevido a powerful choice for constructing scalable, efficient SoCs. Its configurability ensures that developers can tailor the core precisely to meet the specific needs of their projects.
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