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The Qualitas eDP RX PHY IP supports the eDP RX v1.5a standard. This core IP commonly used for connecting a timing controller (TCON) to a host processor.
The Qualitas' 5nm PCIe PHY IP consists of hardmacro PMA and PCS compliant to PCIe Base 6.0 specification. This IP offers a cost-effective and low-power solution using 5nm FinFet CMOS technology. It includes all ESD I/Os and bump pads, and supports extensive built-in self test features such as loopback and scan.
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