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OPENEDGES Technology

OPENEDGES Technology is a prominent semiconductor IP provider specializing in advanced memory subsystem IP solutions and deep learning accelerators. The company focuses on delivering highly efficient AI edge computing solutions that offer exceptional performance quality. Their passion for innovation is evident in their carefully designed IP products that enhance system synergies and optimize performance. The company's offerings include a comprehensive range of memory subsystem IPs, such as interconnect, memory controller, and PHY IPs, which are seamlessly integrated to maximize system efficiency. Furthermore, OPENEDGES is committed to meeting the demands of next-generation AI chips that require advanced features, including low latency, high bandwidth, and support for multiple DRAM protocols. In addition to memory IP, OPENEDGES Technology provides a state-of-the-art neural processing unit (NPU) designed for edge computing environments. This NPU IP ensures energy efficiency and significant performance density, outperforming alternate solutions in the market. Their advanced products cater to diverse applications, including automotive, high-performance computing, and mobile devices, demonstrating their dedication to leading-edge technology development. Read more

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NoC Bus Interconnect

The OPENEDGES Network on Chip (NoC) Bus Interconnect, OIC, is a high-performance solution designed to boost system-on-chip (SoC) design flexibility and efficiency. Leveraging the company's cutting-edge HyperPath technology, it offers double performance gains with extremely low latency, ensuring accelerated communication pathways within complex digital systems. Its ActiveQoS feature manages bandwidth and latency dynamically across the memory subsystem, enhancing the efficient transfer of signals within large and intricate systems. This is paired with asynchronous bridge technology, which resolves long-distance and narrow topology challenges in design, maintaining fidelity and high throughput. Engineered for low power operation, it uses advanced clocking methods to reduce idle power extensively. Given its automated end-to-end RTL generation and simplified SoC design capabilities, the NoC Bus Interconnect from OPENEDGES stands out as an optimal backbone solution for modern computing platforms requiring robust and efficient interconnections.

OPENEDGES Technology
81 Views
Network on Chip
View Details Datasheet

DDR Memory Controller

OPENEDGES' DDR Memory Controller, known as OMC, boasts an innovative architecture that ensures high utilization and ultra-low latency, crafted to address next-gen SoC needs efficiently. With proprietary scheduling algorithms, it achieves optimal performance, particularly when paired with its proprietary ORBIT DDR PHY and on-chip interconnect. This memory controller supports diverse DRAM memory types, including LPDDR5x/5/4x/4/3, DDR4/3, and GDDR6, offering high configurability. It automatically manages dynamic frequency scaling and DRAM power, ensuring low power consumption while maintaining high area efficiency. Its out-of-order scheduling allows it to handle peak latencies, crucial in high-performance scenarios. Integrating seamlessly within client ecosystems, OMC's robust design adapts well to third-party DDR PHYs, guaranteeing comprehensive compatibility. This adaptability, along with its security features like ECC and a security firewall, makes it an ideal choice for secure high-speed applications.

OPENEDGES Technology
65 Views
DDR
View Details Datasheet

DDR PHY

The DDR PHY from OPENEDGES features an embedded microprocessor and a sophisticated mixed-signal architecture to tackle DRAM integration challenges effectively in both high-performance and low-power environments. Its design minimizes long-term impedance drift and clock phase drift, allowing seamless updates without interrupting data processing between the memory controller and DRAM. With configurable timing and boundary flexibility, it significantly reduces read/write latency. The product is meticulously crafted with power management integration and an advanced PLL design to manage power consumption efficiently across various application areas, such as AI, mobile, and automotive sectors. Its remarkable integration within the ORBIT Memory Subsystem lends it ActiveQoS capabilities that balance bandwidth effectively across the SoC memory subsystem. The DDR PHY supports multiple memory standards, including LPDDR5x/5/4x/4, DDR5, and GDDR6 while offering configurations that accommodate varied DRAM package types. Its adaptability and cost-effective design make it suitable for a wide range of applications with constraints on package and PCB layer requirements.

OPENEDGES Technology
58 Views
GLOBALFOUNDARIES, Samsung, TSMC, UMC
7nm, 10nm, 12nm, 16nm, 22nm, 28nm
DDR
View Details Datasheet

NPU

The NPU by OPENEDGES, known as ENLIGHT, is a cutting-edge neural processing unit tailored for deep learning applications requiring high computational efficiency. It introduces an innovative approach by utilizing mixed-precision computation (4/8-bit), heavily optimizing processing power and reducing DRAM traffic through advanced scheduling and layer partitioning techniques. This NPU offers superior energy efficiency and compute density, making it significantly more effective than competing alternatives. It is highly customizable, accommodating varying core sizes to meet specific market demands, ensuring a broad application reach from AI and ML tasks to edge computing requirements. ENLIGHT enhances performance with its DNN-optimized vector engine and advanced algorithm supports, including convolution and non-linear activation functions. Its toolkit supports popular formats like ONNX and TFLite, simplifying integration and accelerating the development process for complex neural network models in high-performance environments.

OPENEDGES Technology
58 Views
AI Processor, Multiprocessor / DSP
View Details Datasheet

ORBIT Memory Subsystem

ORBIT Memory Subsystem is a state-of-the-art memory solution by OPENEDGES, integrating sophisticated interconnect, memory controller, and PHY IPs designed to deliver superior performance and system efficiency. It's crafted to support the demands of next-generation AI chips, offering capabilities like reduced latency, high bandwidth, and multiple DRAM protocol support. This subsystem ensures excellent synergy between its components through a design that balances bandwidth and latency dynamically, improving the SoC's overall performance and reliability. It incorporates ActiveQoS technology, which finely tunes these parameters to prioritize latency-sensitive tasks, thereby avoiding potential congestion and ensuring smooth data flow. ORBIT's innovation lies in its ability to scale and adapt to emerging DRAM technologies quickly, which expands its application range and extends product cycles. This memory subsystem is especially suitable for industries requiring robust and adaptable memory solutions, such as AI markets, enabling versatile deployments and enhanced application competitiveness.

OPENEDGES Technology
38 Views
DDR, Network on Chip, SDRAM Controller
View Details Datasheet
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