Is this your business? Claim it to manage your IP and profile
The Network Protocol Accelerator Platform (NPAP) is a high-performance solution that accelerates TCP/UDP/IP protocols within FPGA- and ASIC-based systems. Developed alongside the Fraunhofer Heinrich-Hertz-Institute, this platform offers customizable high-bandwidth and low-latency communication capabilities essential for Ethernet links ranging from 1G to 100G. It's designed for various hardware applications, providing turnkey solutions and integrates synthesizable HDL codes capable of being implemented directly into FPGAs. At its core, NPAP enhances CPU performance by handling TCP/UDP/IP processing within programmable logic, thereby boosting network throughput while minimizing latency. The platform's modular architecture supports full line-rate processing up to 70 Gbps in FPGAs and over 100 Gbps in ASICs. It features bi-directional data paths supporting multiple, parallel TCP engines designed for scalable network processing. Its utility extends to FPGA-based SmartNICs, networked storage such as iSCSI, and even high-speed video transmissions. The NPAP can be evaluated via a Remote Evaluation System, allowing potential users to conduct a hands-on assessment through a remote connection to MLE's lab, providing flexibility and saving integration time.
The NVMe Streamer is a robust IP core designed to enhance data storage performance by leveraging the capabilities of Non-Volatile Memory Express (NVMe) protocols. Integrated seamlessly into FPGAs, this core provides full accelerator NVMe host subsystem functionalities, ideally suited for Xilinx Zynq Ultrascale+ MPSoC and RFSoC devices. The NVMe Streamer offers complete programmability, allowing for CPU-less operations that maximize data throughput while keeping the processing system unobtrusive. This subsystem efficiently utilizes Xilinx GTH and GTY Multi-Gigabit Transceivers along with PCIe Hard IP Cores, making it fully compatible with PCIe Gen 1 through Gen 4 speeds. It supports various lane configurations to ensure optimal scalability and adaptability for high-speed data applications. Users benefit from full acceleration features, integrating host controller capabilities that simplify the setup and configuration of NVMe IO commands, significantly increasing performance and system responsiveness. The NVMe Streamer's applications are extensive, covering high-speed data acquisition and seamless sensor data recording. It is particularly advantageous for automotive and aerospace data logging, where reliability and efficiency are paramount. Its design enables lossless and accurate recording and streaming from solid-state drives (SSDs), offering advanced storage protocol offloading for modern high-bandwidth demands.
The Key-Value-Store Accelerator (KVS) significantly advances data center storage capabilities through FPGA-based acceleration. By integrating high-performance computing systems, this accelerator optimizes data flow architectures, facilitating hyperconvergence and object storage within networked environments. It features the ability to support high processing throughput, balancing low-latency access with expansive storage capacities via interfaces connecting to DDR3/DDR4 DRAM, NVMe SSDs, or SATA/SAS disks. Built with a foundation on the Xilinx Zynq UltraScale+ MPSoC, the KVS Accelerator promises seamless compatibility and scalability. Its architecture harnesses a combination of line-rate TCP/IP and Memcached processing within the programmable logic, producing extensive server power reductions via heterogeneous computing frameworks. This approach promises efficient processing capabilities at line speeds of 10, 25, 40, and even 100 GigE. This technology suits a range of applications, including accelerating Memcached servers for online transactional processing, object storage for hyper-converged nodes, and hybrid SSD/HDD setups. Its modular design in HDL and C/C++ ensures easy integration into existing frameworks, offering tailored configurations for diverse storage requirements across various markets.
The Low Latency Ethernet 10G/25G MAC developed by Missing Link Electronics in collaboration with the Fraunhofer Heinrich-Hertz-Institute delivers cutting-edge Ethernet communication for FPGA-based systems. This MAC core provides low-latency, high-bandwidth connectivity, essential for applications operating at speeds of 10 to 25 Gigabits per second. Key attributes of the MAC include platform and device vendor independence, facilitating broad adaptability across different projects. It incorporates AXI4-Stream support on both transmit and receive interfaces, ensuring efficient data throughput with minimal latency, down to 19.2 nanoseconds at 156.25MHz for 64-bit operations. The design emphasizes resource efficiency, keeping usage minimal while supporting essential features such as VLAN tagging, CRC-32 integrity checks, and customizable frame length. This technology caters to various applications requiring fast and reliable network communication, from video handling in multi-system setups to storage-intensive solutions. Customers benefit from reduced latency, pivotal in environments where rapid data exchange dictates system performance, positioning the MAC IP as a critical component for high-speed Ethernet solutions.
Join the world's most advanced semiconductor IP marketplace!
It's free, and you'll get all the tools you need to discover IP, meet vendors and manage your IP workflow!
To evaluate IP you need to be logged into a buyer profile. Select a profile below, or create a new buyer profile for your company.
