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M31's Analog Phase-Locked Loop (PLL) IP is a versatile frequency synthesizer featuring a broad input reference range between 10 and 240 MHz, with an output scaling from 1.5 to 3.0 GHz. Designed with a Type-II architecture utilizing a sigma delta modulator for fractional frequency adjustments, this PLL achieves notable power supply noise rejection, crucial for operating within noisy SoC environments. Its streamlined integration approach eliminates complex configurations, providing a no-fuss solution for applications needing robust frequency control. This IP offers wide compatibility and flexibility for deployment in a multitude of consumer and industrial electronic applications.
The STD-Cell Library by M31 provides a versatile range of standard cell libraries essential for digital design, offering optimized solutions to enhance performance, power efficiency, and area utilization. It includes the High Density Standard Cell Library (HDSC) for cost-effective, dense integration, the General Purpose Standard Cell Library (GPSC) balancing various parameters for logic functions, and the High Speed Standard Cell Library (HSSC) aimed at critical path performance. These libraries are suitable for numerous applications, such as IoT, AI, and automotive industries. Capabilities like Engineering Change Order Library (ECO) allow for design adaptability, while power management kits (PMK) and low power optimization kits (LPKT) offer refined energy efficiency. These libraries support process nodes from 12nm to 180nm and are silicon-proven for reliable integration in diverse technological frameworks.
The Digital-PLL from M31 is designed to deliver high-performance frequency synthesis for diverse semiconductor applications. Featuring a pure core voltage design and a compact size, the PLL supports a range of operational modes, including Fractional-N PLL and Spread Spectrum Clocking (SSC). It offers outstanding power noise immunity and meticulous integration for seamless embedding in ASICs and SoCs. The PLL is particularly adept for environments like noisy ASICs, ensuring high reliability with power-efficient operations. This digital PLL supports various crystal oscillator frequencies, underscoring its adaptability and effectiveness for high-precision electronic systems.
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