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The IPM-NVMe Host IP Core by IP Maker is engineered for high-performance storage systems that require a comprehensive NVMe protocol management on the host side, all without the need for a CPU. This makes it particularly suitable for embedded applications where cost, space, and power are constrained. The Host IP Core supports direct integration with NVMe SSDs, offering seamless compatibility for various embedded storage solutions. One of the key advantages of this IP core is its capability to perform at over 1 million IOPS without relying on an expensive CPU, thanks to its full hardware implementation. It boasts automatic PCIe and NVMe initialization, support for PCIe Gen 3x8, and various data paths with ultra-low latency and high throughput, ensuring impressive storage performance even in compact systems. The design delivers a low power, low gate count solution that is easy to integrate into existing systems. Its features include automatic command management, integration with user interfaces for memory configuration, and direct NVMe command management. The fully-featured IP core significantly reduces time-to-market for OEMs by using pre-validated technology and is supported with extensive deliverables like Verilog RTL code and technical documentation to facilitate easy integration into designs.
The BCH Encoder/Decoder IP Core by IP Maker enhances NAND Flash memory reliability by employing advanced error correction through the BCH algorithm. This IP is crucial for NAND Flash-based storage devices, ensuring data integrity by detecting and correcting errors that occur during write cycles. Its design is highly customizable, allowing adjustments for optimal trade-offs between gate count and latency according to specific application needs. IP Maker's BCH IP Core is engineered for ease-of-use in both FPGA and SoC environments. It offers full hardware implementation to ensure maximum performance and a balanced trade-off between performance and gate count. Customizable features include latency adjustments, datapath configurations, and error number handling, along with full Galois field coverage. The IP Core supports configurations to match various packet sizes and is capable of handling up to 76 error-bits per block. This IP Core's flexibility is intended to optimize time-to-market while providing robust error correction capabilities. Deliverables include Verilog RTL source code, synthesis scripts, and detailed technical documentation, facilitating straightforward implementation in a variety of systems. The BCH Encoder/Decoder is fully validated to ensure reliable performance across different hardware setups, offering a solid foundation for building data storage solutions that require high data validity and extended memory lifespan.
The IPM-NVMe2NVMe by IP Maker offers a dynamic reference design for NVMe to NVMe data transfers, making it ideal for high-performance storage solutions that require custom features like encryption or RAID. This architecture is built around NVMe Offload IPs and can be configured to manage multiple host interfaces, allowing seamless integration of processing accelerator IPs for advanced storage management tasks such as encryption and data deduplication. It delivers ultra-low latency and high throughput, thanks to its low power, low gate count architecture. Being NVM Express compliant, the IP core can manage one to multiple host interfaces with easy integration, reducing time-to-market concerns. Its flexible architecture supports diverse configurations, from simple capacity aggregation to complex multi-namespace setups, ensuring customizable performance and redundancy configurations. The IPM-NVMe2NVMe core provides endless combinations to address various customer needs, from transparent RAID 1 storage solutions to multi-namespace configurations with different attributes. It is a pioneering path toward computational storage, facilitating sophisticated operations within storage appliances and beyond, supporting Gen3 x16 or Gen4 x8 interfaces.
The Universal NAND Flash Controller (UNFC) IP core from IP Maker is engineered for enterprise storage applications demanding high reliability and bandwidth. It's designed to enable effective use of commodity Flash memory, significantly enhancing IOPS with lower-cost SLC, MLC, and TLC NandFlash memory. The UNFC IP core is available for all major FPGA vendors and ASIC providers, supporting the newest ONFI standards while maintaining backward compatibility. This IP core is full-featured, integrating easily into FPGA and SoC designs with various native backends like AXI, Avalon, and RAM, offering customizable connection modules. Its comprehensive configuration options include the flexibility to choose page sizes and spare sizes per channel, supporting a dynamically set channel-based address. The controller is fully compliant with ONFI 5.0 standards, covering SDR and NVDDR modes up to the latest NV-LPDDR4. Moreover, the IP Maker UNFC is designed to support high-performance, cost-effective storage, reducing time-to-market with validated and easy-to-integrate IP. Deliverables for this IP include Verilog RTL source code, synthesis scripts, simulation testbenches, and comprehensive technical documentation, ensuring a smooth design process for developers. It also features configurable block sizes and up to 84-error correction capabilities per 1k block, ensuring robust data reliability in storage solutions.
IP Maker's NVMe Device IP Core is designed to enhance PCIe-based storage solutions by offloading data flow management from the host CPU. This high-performance NVMe IP core serves as a bridge between the communication interface and NAND flash controllers, significantly boosting system throughput and reducing latency. It is compliant with the NVM Express specifications and is listed in the NVMe integrator's registry, ensuring broad compatibility across platforms. The NVMe Device IP Core is optimized for ultra-low latency and very high throughput, making it ideal for applications demanding efficient power usage and high-speed data transfers. It supports PCIe Gen1 to Gen5, providing flexibility for various implementations. The architecture also boasts a low power design with a minimal gate count, contributing to a reduction in system cost through interface standardization. Furthermore, the NVMe Device IP core includes features like automatic command processing, multi-channel DMA, and supports up to 65536 I/O queues, catering to sophisticated storage operations. Its robust architecture caters to both ASIC and FPGA implementations, providing comprehensive support for consumer and enterprise products alike. This core can integrate seamlessly with other IP Maker products, forming a complete storage solution for demanding environments.
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