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The SDI Mapping IP Cores offered by intoPIX are designed for the efficient transmission of high-resolution video using existing SDI infrastructure. These cores support the mapping of JPEG XS-encoded video over SDI, enabling the transport of higher resolutions like 4K and 8K over conventional HD-SDI and 3G-SDI links. By leveraging this technology, users can upgrade their systems to handle more data without needing to overhaul their existing SDI setups. This method not only enhances current broadcast systems but also ensures interoperability with existing industry standards, providing a future-proof solution for high-resolution video needs.
TicoRAW IP Cores are engineered for efficient processing and compression of RAW Bayer image sensor data. They are optimized for real-time performance with minimal latency and are compact enough for implementation in small FPGAs and ASICs. The technology supports a broad range of sensor formats and bit depths, accommodating high-resolution imaging needs from HD to 16K and beyond. By offering enhanced compression with minimal bandwidth requirements, TicoRAW improves data handling while maintaining the full quality and flexibility of RAW data, making it ideal for modern imaging applications that demand high precision and efficiency.
TicoXS is a state-of-the-art compression technology that adheres to the JPEG XS standard, designed for ultra-low latency operations with lossless quality. It is especially optimized for FPGA and ASIC implementations, ensuring minimal resource usage while maintaining high-performance video encoding and decoding. The IP cores support a broad range of resolutions from HD up to 10K and offer compatibility with various color spaces like RGB and YCbCr. TicoXS provides adjustable compression ratios, catering to both visually lossless and mathematically lossless needs, making it perfect for real-time video applications where latency is critical.
These IP cores integrate intoPIX’s JPEG XS video codecs with RTP encapsulation capabilities, designed for compliant transport of video over IP networks using the SMPTE ST 2110-22 standard. The subsystem IP cores support seamless integration with existing and new FPGA designs, offering a plug-and-play solution for converting uncompressed video streams into compressed JPEG XS RTP streams. This efficient setup allows for simplified video-over-IP workflows with minimal additional infrastructure, promoting flexibility and ensuring broad compatibility and scalability across various applications in the broadcasting and media production sectors.
The MPEG2-TS IP Cores provide a robust solution for the encapsulation and transmission of JPEG XS and JPEG 2000 compressed video streams over MPEG2 transport streams. These cores are vital for maintaining interoperability across various video compression schemes, enabling smooth integration in applications that require video streaming over multiplexed systems. The architecture supports simultaneous handling of video, audio, and ancillary data, ensuring comprehensive data transport solutions in media broadcast and storage environments. This technology is crucial for bridging traditional MPEG2 infrastructures with modern compression standards like JPEG XS and JPEG 2000.
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