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Eliyan

Eliyan Corp, a semiconductor IP provider, is revolutionizing the industry with its advanced PHY technology, NuLink™. This innovative solution caters to the increasing demand for seamless die-to-die (D2D) and die-to-memory (D2M) connections, significantly enhancing performance and power efficiency in both standard and advanced packaging scenarios. Founded on breakthroughs in PHY technology architecture, Eliyan sets itself apart by leveraging simultaneous bidirectional (SBD) connections, doubling the bandwidth per interface to support high-performance applications such as AI training and large language models (LLMs). Eliyan's core competency lies in its ability to deliver exceptional performance improvements while minimizing power consumption. The company's solutions are designed to overcome the bottlenecks experienced in modern multi-die assemblies, using silicon and organic substrates to offer unparalleled efficiency. By supporting multiple industry standards, including UCIe and BoW, Eliyan ensures its technology is versatile and adaptable, catering to a broad spectrum of semiconductor applications in various packaging environments. A member and active contributor to several industry standard organizations, Eliyan is committed to advancing the semiconductor landscape through its groundbreaking innovations. With a focus on performance, power, and space efficiency, Eliyan is driving the development of next-generation semiconductor solutions, ensuring its technologies remain at the forefront of fostering smarter and more robust integration strategies. Read more

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IPs available

NuLink Die-to-Die PHY for Standard Packaging

Eliyan's NuLink Die-to-Die PHY technology represents a significant advancement in chiplet interconnect solutions. Designed for standard packaging, this innovative PHY IP delivers robust high-performance with low power consumption, a balance that is crucial for modern semiconductor designs. The NuLink PHY supports multiple industry standards, including the Universal Chiplet Interface Express (UCIe) and Bunch of Wires (BoW), ensuring it can cater to a wide range of applications. A standout feature of the NuLink PHY is its simultaneous bidirectional (SBD) signaling capability, which allows data to be sent and received over the same wire at the same time, effectively doubling bandwidth. This makes it an ideal solution for data-intensive applications such as AI training and inference, particularly those requiring ultra-low latency and high reliability. The technology is also adaptable for different substrates, including both silicon and organic, offering designers flexibility in their packaging approaches. NuLink's architecture stems from extensive industry insights and is informed by Eliyan’s commitment to innovation. The platform provides a power-efficient and cost-effective alternative to traditional advanced packaging solutions. It achieves interposer-like performance metrics without the complexity and cost associated with such methods, enabling operational efficiency and reduced time-to-market for new semiconductor products.

AMBA AHB / APB/ AXI, CXL, D2D, MIPI, Network on Chip, Processor Core Dependent

NuLink Die-to-Memory PHY Products

The NuLink Die-to-Memory PHY products offer a revolutionary approach to memory interface design, utilized in cutting-edge semiconductor applications. These products bring together low-power consumption and high-performance metrics, crucial for managing increasingly complex memory requirements. The dynamic architecture allows NuLink to handle both high-density and high-bandwidth memory configurations, promoting versatility in design aspects. NuLink's D2M technology supports bidirectional transceivers, capable of swiftly switching between transmitting and receiving modes, optimizing bandwidth without the necessity for separate read/write lanes. This feature significantly enhances data throughput, ensuring efficient memory access for applications like high-bandwidth memory (HBM) interfaces on standard organic substrates. One of the key advancements of NuLink is its capacity to deliver substantial bandwidth improvements while reducing costs associated with traditional memory PHY designs. The integration of the Universal Memory Interface (UMI) concept is testimony to its innovation, allowing seamless connectivity for various DRAM technologies, thereby simplifying the design process and enabling broad system compatibility.

DDR, HBM, SDRAM Controller