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Eliyan’s NuLink Die-to-Die (D2D) PHY technology is designed to revolutionize the interconnection of chiplets using industry-standard packaging techniques. This technology offers low power consumption while maintaining high-performance metrics, seamlessly integrating into both standard and advanced packaging options. Eliyan's D2D IP allows for significant flexibility in application design and reduces the dependency on complex silicon interposer technologies. By using standard organic/laminate packages, the NuLink technology enhances system-level design optimizations, cost savings, and thermal performance. Support for numerous industry standards, including UCIe and BoW, ensures a versatile application in a wide array of semiconductor designs. The tailored PHY IP cores facilitate the incorporation of high-bandwidth interconnected systems within ASICs without the necessity of proprietary packaging methods. With up to 64 data lanes and bump map layouts adaptable to specific protocols, the NuLink D2D PHY exemplifies adaptable technology suitable for various semiconductor applications. This unique approach allows for greater design flexibility, mixing and matching chiplets with different dimensions, which is particularly beneficial in applications involving high bandwidth and low latency requirements. The ability of the NuLink D2D technology to deliver interposer-like bandwidth and power without high-cost advanced packaging makes it a remarkable solution in cutting-edge chip design.
Eliyan's NuLink Die-to-Memory (D2M) PHY technology enables robust communication between logic dies and memory dies using standard packaging solutions. By offering high-speed data transfer rates and low latency operations, this technology is critical in overcoming traditional memory wall challenges in advanced computing systems. The technology supports seamless, high-efficiency interconnects creating a perfect synergy between computational and memory components within a single package. As opposed to conventional unidirectional solutions, the D2M technology from Eliyan provides a bidirectional data flow in a low-power, high-performance framework. This increases the throughput efficiency enabling intensive data-driven applications to optimize their processing cycles effectively. Additionally, the NuLink D2M PHY supports configurable bump map layouts, facilitating seamless integration into various industry-standard protocols and enhancing its adaptability for different design architectures. This solution is engineered for situations where separation between high-temperature processors and heat-sensitive memory components is crucial. It achieves interposer-like performance levels without the cost implications of advanced silicon interposer technologies, making it ideal for scalable high performance applications demanding extensive memory interaction.
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