Our IP is hosted on Silicon Hub, letting you download trial versions instantly. Browse our IP below, or find out more.
The agileADC analog-to-digital converter is a traditional Charge-Redistribution SAR ADC that is referenced to VDD, VSS. The architecture can achieve up to 12-bit resolution at sample rates up to 64 MSPS. It includes a 16-channel input multiplexor that can be configured to be buffered or unbuffered, and support differential or single-ended inputs. Agile Analog designs are based on tried and tested architectures to ensure reliability and functionality. Our automated design methodology is programmatic, systematic and repeatable leading to analog IP that is more verifiable, more robust and more reliable. Our methodology also allows us to quickly re-target our IP to different process options. Our highly configurable and multi-node analog IP products are developed to meet the customer’s exact requirements. These digitally-wrapped and verified solutions can be seamlessly integrated into any SoC, significantly reducing complexity, time and costs.
The agilePMU Subsystem is an efficient and highly integrated power management unit for SoCs/ASICs. Featuring a power-on-reset, multiple low drop-out regulators, and an associated reference generator. The agilePMU Subsystem is designed to ensure low power consumption while providing optimal power management capabilities. Equipped with an integrated digital controller, the agilePMU Subsystem offers precise control over start-up and shutdown, supports supply sequencing, and allows for individual programmable output voltage for each LDO. Status monitors provide real-time feedback on the current state of the subsystem, ensuring optimal system performance. Agile Analog designs are based on tried and tested architectures to ensure reliability and functionality. Our automated design methodology is programmatic, systematic and repeatable leading to analog IP that is more verifiable, more robust and more reliable. Our methodology also allows us to quickly re-target our IP to different process options. Our highly configurable and multi-node analog IP products are developed to meet the customer’s exact requirements. These digitally-wrapped and verified solutions can be seamlessly integrated into any SoC, significantly reducing complexity, time and costs.
The agileDSCL is a compact digital standard cell library customizable for specific foundries and processes, and optimized for low-power, ultra-low-leakage, high-density or high-speed applications. It provides a selection of standard cells with functionalities essential to implement digital designs, with additional power management library to support the implementation of low-power designs. Agile Analog designs are based on tried and tested architectures to ensure reliability and functionality. Our automated design methodology is programmatic, systematic and repeatable leading to analog IP that is more verifiable, more robust and more reliable. Our methodology also allows us to quickly re-target our IP to different process options. Our highly configurable and multi-node analog IP products are developed to meet the customer’s exact requirements. These digitally-wrapped and verified solutions can be seamlessly integrated into any SoC, significantly reducing complexity, time and costs.
The agileDAC is a digital-to-analog converter that uses a traditional capacitive DAC architecture. The agileDAC uses its own internal reference voltage. The architecture can achieve up to 10-bit resolution at sample rates up to 16 MSPS. Agile Analog designs are based on tried and tested architectures to ensure reliability and functionality. Our automated design methodology is programmatic, systematic and repeatable leading to analog IP that is more verifiable, more robust and more reliable. Our methodology also allows us to quickly re-target our IP to different process options. Our highly configurable and multi-node analog IP products are developed to meet the customer’s exact requirements. These digitally-wrapped and verified solutions can be seamlessly integrated into any SoC, significantly reducing complexity, time and costs.
The agileTSENSE_D temperature sensor provides a digital output, extending the capabilities of traditional temperature sensing by incorporating digital signal processing. It retains the core analog sensing mechanism but wraps the output in a digital format for easier integration into modern digital systems, including IoT devices and data centers. This product is designed for environments where digital interfacing is critical. With its adaptable architecture, the agileTSENSE_D delivers precision temperature measurements over a broad operational range, ensuring that systems maintain optimal performance and safety. This functionality is crucial for thermal monitoring and management. Agile Analog designs are based on tried and tested architectures to ensure reliability and functionality. Our automated design methodology is programmatic, systematic and repeatable leading to analog IP that is more verifiable, more robust and more reliable. Our methodology also allows us to quickly re-target our IP to different process options. Our highly configurable and multi-node analog IP products are developed to meet the customer’s exact requirements. These digitally-wrapped and verified solutions can be seamlessly integrated into any SoC, significantly reducing complexity, time and costs.
The agileREF consists of a bandgap reference core together with a bandgap reference voltage generator (VREF), VREF replica current generators and bias current generators. The number of output bias currents can be specified up to a maximum of 16 configurable outputs. Agile Analog designs are based on tried and tested architectures to ensure reliability and functionality. Our automated design methodology is programmatic, systematic and repeatable leading to analog IP that is more verifiable, more robust and more reliable. Our methodology also allows us to quickly re-target our IP to different process options. Our highly configurable and multi-node analog IP products are developed to meet the customer’s exact requirements. These digitally-wrapped and verified solutions can be seamlessly integrated into any SoC, significantly reducing complexity, time and costs.
The agileCMP programmable threshold comparator features a user-selectable (enable/disable) hysteresis as well as programmable threshold with 10mV step size, a latched output as well as an active (unlatched) output. With a focus on long battery life, the agileCMP can be used to monitor external analog signals and enable wake-up events as is essential in many modern SoCs. The agileCMP programmable threshold comparator is ideally suited for interrupt generation in application areas such as HPC, IoT, security, automotive and AI. Agile Analog designs are based on tried and tested architectures to ensure reliability and functionality. Our automated design methodology is programmatic, systematic and repeatable leading to analog IP that is more verifiable, more robust and more reliable. Our methodology also allows us to quickly re-target our IP to different process options. Our highly configurable and multi-node analog IP products are developed to meet the customer’s exact requirements. These digitally-wrapped and verified solutions can be seamlessly integrated into any SoC, significantly reducing complexity, time and costs.
The agileTSENSE_A is a general-purpose temperature sensor that utilizes a ΔVBE sensing mechanism to amplify and transform temperature-related voltages into a single-ended signal. This sensor is designed to work seamlessly with the agileADC to provide digital outputs with impressive accuracy of +/-0.25°C. It's especially significant for modern SoCs, where thermal management is crucial for power optimization and security threat detection. This sensor covers a wide operating range from -20°C to +100°C. It features a rapid startup time and minimal current consumption, making it apt for SoC integrations where efficiency is key. Further customization options allow for ease of incorporation into diverse systems. Agile Analog designs are based on tried and tested architectures to ensure reliability and functionality. Our automated design methodology is programmatic, systematic and repeatable leading to analog IP that is more verifiable, more robust and more reliable. Our methodology also allows us to quickly re-target our IP to different process options. Our highly configurable and multi-node analog IP products are developed to meet the customer’s exact requirements. These digitally-wrapped and verified solutions can be seamlessly integrated into any SoC, significantly reducing complexity, time and costs.
The agileVGLITCH voltage monitor provides security and protection against voltage side-channel attacks (SCAs) and tampering such as supply voltage changes/glitches and power supply manipulation. The sensor provides digital outputs to warn (secure) processors of intrusion attempts, thus enabling a holistic approach to hardware security. As a key part of the agileSCA TVC (Temperature, Voltage, Clock) security sensor this can be tuned to your specifications. It is ideally suited for monitoring in application areas such as IoT, AI, security and automotive. Agile Analog designs are based on tried and tested architectures to ensure reliability and functionality. Our automated design methodology is programmatic, systematic and repeatable leading to analog IP that is more verifiable, more robust and more reliable. Our methodology also allows us to quickly re-target our IP to different process options. Our highly configurable and multi-node analog IP products are developed to meet the customer’s exact requirements. These digitally-wrapped and verified solutions can be seamlessly integrated into any SoC, significantly reducing complexity, time and costs.
The agileLDO is a linear low drop-out (LDO) voltage regulator providing precision and programmable voltage regulation across a wide range of input and output voltages. The regulator architecture provides a high dynamic performance making it suitable for demanding digital applications. Whilst the low noise and high PSRR lends itself to powering noise-sensitive analog circuits. Agile Analog designs are based on tried and tested architectures to ensure reliability and functionality. Our automated design methodology is programmatic, systematic and repeatable leading to analog IP that is more verifiable, more robust and more reliable. Our methodology also allows us to quickly re-target our IP to different process options. Our highly configurable and multi-node analog IP products are developed to meet the customer’s exact requirements. These digitally-wrapped and verified solutions can be seamlessly integrated into any SoC, significantly reducing complexity, time and costs.
The agileIRDROP IR Drop Sensor is a circuit to detect supply IR drops within the system. It is useful to detect loss of power or attacks to the power supply. The agileIRDROP consists of a voltage reference and comparator(s) set at different threshold levels for multi-level detection. The number of trigger outputs can be customized, and each threshold can be adjusted during operation to support DVFS operation. A four-output configuration is shown in the block diagram as reference. Agile Analog designs are based on tried and tested architectures to ensure reliability and functionality. Our automated design methodology is programmatic, systematic and repeatable leading to analog IP that is more verifiable, more robust and more reliable. Our methodology also allows us to quickly re-target our IP to different process options. Our highly configurable and multi-node analog IP products are developed to meet the customer’s exact requirements. These digitally-wrapped and verified solutions can be seamlessly integrated into any SoC, significantly reducing complexity, time and costs.
The agileRCOSC is an RC Oscillator based on a traditional architecture which allows for the frequency to be trimmed to remove the effects of process variation. This can also be configured as a Free Running Clock (FRC) where a high accuracy clock is not required. Agile Analog designs are based on tried and tested architectures to ensure reliability and functionality. Our automated design methodology is programmatic, systematic and repeatable leading to analog IP that is more verifiable, more robust and more reliable. Our methodology also allows us to quickly re-target our IP to different process options. Our highly configurable and multi-node analog IP products are developed to meet the customer’s exact requirements. These digitally-wrapped and verified solutions can be seamlessly integrated into any SoC, significantly reducing complexity, time and costs.
The agilePVT Sensor Subsystem is a low power integrated macro consisting of Process, Voltage and Temperature sensors, and associated reference generator, for on-chip monitoring of a device's physical, environmental, and electrical characteristics. The monitoring of process, voltage and temperature variations are critical to optimize power and performance for modern SoCs/ASICs, especially for advanced node and FinFET processes. Equipped with an integrated digital controller, the agilePVT Subsystem offers precise control over start-up and shutdown. Status monitors provide real-time feedback on the current state of the subsystem, ensuring optimal system performance over the full product lifecycle. Agile Analog designs are based on tried and tested architectures to ensure reliability and functionality. Our automated design methodology is programmatic, systematic and repeatable leading to analog IP that is more verifiable, more robust and more reliable. Our methodology also allows us to quickly re-target our IP to different process options. Our highly configurable and multi-node analog IP products are developed to meet the customer’s exact requirements. These digitally-wrapped and verified solutions can be seamlessly integrated into any SoC, significantly reducing complexity, time and costs.
The agileSensorIF Subsystem is an efficient and highly integrated sensor interface for SoCs/ASICs. Featuring multiple Analog-to-Digital converters (agileADC), Digital-to-Analog converter (agileDAC), low-power programmable analog comparators (agileCMP_LP), and an associated reference generator (agileREF). The agileSensorIF Subsystem enables easy interaction with the analog world. The components within the subsystem can be customized to suit a variety of applications. This includes selecting the number of agileADC, agileDAC and agileCMP_LP blocks, as well as their bit depth and sample rate. This allows the agileSensorIF Subsystem to be perfectly tailored to your exact needs and use case. Status monitors provide real-time feedback on the current state of the subsystem, ensuring optimal system performance. Agile Analog designs are based on tried and tested architectures to ensure reliability and functionality. Our automated design methodology is programmatic, systematic and repeatable leading to analog IP that is more verifiable, more robust and more reliable. Our methodology also allows us to quickly re-target our IP to different process options. Our highly configurable and multi-node analog IP products are developed to meet the customer’s exact requirements. These digitally-wrapped and verified solutions can be seamlessly integrated into any SoC, significantly reducing complexity, time and costs.
The agileSMU Subsystem is a low power integrated macro consisting of the essential IP blocks required to securely manage waking up a SoC from sleep mode. Typically containing a programmable oscillator for low frequency SoC operation including a RTC, a number of low power comparators which can be used to initiate the wake-up sequence, and a power-on-reset which provides a robust, start-up reset to the SoC. Equipped with an integrated digital controller, the agileSMU Subsystem offers precise control over wake-up commands and sequencing. Status monitors provide real-time feedback on the current state of the subsystem, ensuring optimal system performance over the full product lifecycle. Agile Analog designs are based on tried and tested architectures to ensure reliability and functionality. Our automated design methodology is programmatic, systematic and repeatable leading to analog IP that is more verifiable, more robust and more reliable. Our methodology also allows us to quickly re-target our IP to different process options. Our highly configurable and multi-node analog IP products are developed to meet the customer’s exact requirements. These digitally-wrapped and verified solutions can be seamlessly integrated into any SoC, significantly reducing complexity, time and costs.
The agilePOR is a power-on-reset circuit. Based on a traditional architecture, it allows for programmable thresholds for normal and low power modes, programmable delays and includes hysteresis to avoid false resets in noisy environments. Agile Analog designs are based on tried and tested architectures to ensure reliability and functionality. Our automated design methodology is programmatic, systematic and repeatable leading to analog IP that is more verifiable, more robust and more reliable. Our methodology also allows us to quickly re-target our IP to different process options. Our highly configurable and multi-node analog IP products are developed to meet the customer’s exact requirements. These digitally-wrapped and verified solutions can be seamlessly integrated into any SoC, significantly reducing complexity, time and costs.
Join the world's most advanced semiconductor IP marketplace!
It's free, and you'll get all the tools you need to evaluate IP, download trial versions and datasheets, and manage your evaluation workflow!
