All IPs > Wireline Communication > ATM / Utopia
ATM (Asynchronous Transfer Mode) and Utopia (Universal Test & Operations Physical Interface for ATM) are vital technologies associated with wireline communication. These protocols and interfaces ensure a robust and efficient transfer of digital data across networks. The ATM / Utopia semiconductor IP category comprises designs developed to implement these protocols on silicon, enhancing performance and integrating seamlessly within various communication systems.
ATM technology is lauded for its ability to deliver a range of different types of traffic—such as voice, video, and data—on the same network, each with its unique quality of service (QoS) requirements. The ATM semiconductor IPs cater to these needs by providing solutions that support high throughput and low latency. These IP blocks are crucial in environments where data integrity and transmission speed are paramount, such as in telecommunications and enterprise networking systems.
Utopia, on the other hand, serves as the interface standard for linking an ATM layer device to the underlying physical layer. Utopia semiconductor IPs are designed to ensure compatibility and seamless interaction between these layers, thereby optimizing the data transfer process. These IPs allow manufacturers to develop hardware that meets specific standards with minimal compatibility issues, leading to faster market deployment.
In this category, you will find a range of semiconductor IPs that can be integrated into a variety of products, including network routers, switches, and telecommunications equipment. The ATM/ Utopia IP offerings in Silicon Hub are crafted to meet the exacting needs of modern communication networks, ensuring reliability, efficiency, and high performance in every application.
The CT25205 integrates several building blocks of the IEEE 802.3cg 10BASE-T1S Ethernet Physical Layer. Designed with Verilog HDL, this digital core is optimized for implementation on both standard cells and FPGA architectures, ensuring seamless compatibility with IEEE Ethernet MAC interfaces through MII. The core's standout feature is the integrated Physical Layer Collision Avoidance (PLCA) Reconciliation Sublayer, which allows existing MACs to leverage PLCA benefits without additional hardware modifications. A key aspect of this design is its connectivity to an OPEN Alliance 10BASE-T1S PMD Interface, streamlining integration into Zonal Gateways and MCUs. Paired with Canova Tech's complementary IPs, such as the CT25208 MAC controller, CT25205 forms the backbone of cutting-edge communication systems in industries requiring efficient data exchange. The CT25205 supports a wide array of industrial applications due to its robustness and capability to enhance the existing communication frameworks. It is particularly well-suited for automotive and industrial environments where reliable and durable Ethernet solutions are crucial.
The CT25203 serves as a critical part of Canova Tech's Ethernet solutions, providing an analog front-end compliant with the IEEE 802.3cg 10BASE-T1S standard. By using this IP, device designers can achieve outstanding electromagnetic compatibility performance crucial for modern communication systems' stability. Supporting a high-voltage process technology, CT25203 is optimized for compact devices with an 8-pin package, ideal for industrial and automotive environments that require dependable connectivity and robust communication links. Its architecture ensures seamless communication over the 3-pin OPEN Alliance interface with host devices like MCUs and Ethernet switches. These features allow it to meet the rigorous demands of industries requiring compact and efficient solutions, resulting in reliable and efficient performance that integrates seamlessly with other Canova Tech IP offerings, thereby simplifying design and reducing time-to-market.
The LTE Lite solution is a versatile PHY product tailored to support a wide range of channel bandwidths and modulation schemes. Compliant with CAT 0/1 PHY specifications, it offers features such as IF input support, time tracking, and frequency correction for enhanced communication clarity and reliability. Designed for synthesizable Verilog-2001, the system integrates easily with external tuners and ADCs, making it a foundational component in efficient LTE communication setups.
Wasiela's DVB-S2-LDPC-BCH is engineered to deliver robust forward error correction (FEC) essential for digital video broadcasting, particularly over satellite applications. It efficiently combines LDPC and BCH codes to offer near error-free operation, closely approaching the Shannon limit. This capability ensures high-quality, reliable broadcast signals, even in challenging conditions, adhering to ETSI EN 302 307-1 standards.
TmlExpert is a specialized tool designed for detailed transmission-line modeling and simulation. It is particularly valuable in environments where high-speed signal integrity is crucial. The tool provides advanced capabilities to model intricate transmission line structures, enabling users to predict their behavior accurately under various conditions. By delivering precise results, TmlExpert allows designers to optimize their designs for better performance, leading to improved stability and bandwidth. One of the key advantages of TmlExpert is its ability to handle complex high-speed circuit environments. It is engineered to assess a wide range of scenarios, providing valuable insights into potential signal integrity issues. The tool's user-friendly interface ensures that engineers can quickly set up and execute simulations, obtaining results in a timely manner. This efficiency is vital in fast-paced design cycles where time-to-market is critical. TmlExpert's accurate modeling capabilities make it indispensable for electronics professionals looking to enhance the performance of their high-speed digital systems. By providing comprehensive analytics and simulation options, TmlExpert supports the development of robust designs capable of meeting stringent industry standards.
The ePHY-11207 is eTopus’ high-performance offering for organizations that require the ultimate in data transmission rates, supporting speeds from 1Gbps up to 112Gbps. Leveraging cutting-edge technology operating within a 7nm process, this transceiver is designed for environments demanding maximum data integrity and ultra-low latency, closely aligning with sectors such as data centers, AI storage, and next-generation networking solutions. The ePHY-11207 incorporates eTopus’ proprietary DSP technology to deliver unparalleled Bit Error Rate (BER) performance and signal robustness. Engineered for long reach applications, it is capable of supporting a wide range of environmental conditions and insertion loss scenarios. This flexibility ensures it can be utilized effectively in both existing infrastructures and cutting-edge deployments like 5G networks. Equipped with comprehensive diagnostic features and a scalable architecture, the ePHY-11207 facilitates rapid system bring-up and deployment. Its advanced receiver provides a high degree of adaptability, accommodating multiple protocol standards. Coupled with eTopus' extensive SDK and support capabilities, this solution promises easy integration and exceptional reliability, marking it as a cornerstone product for future-proofing network topologies.
The ePHY-5616 is part of eTopus' robust suite of semiconductor solutions designed for high-speed data transmission. Capable of supporting data rates from 1Gbps to 56Gbps, this technology is architected to operate efficiently across a range of process nodes, including 16nm and 12nm technologies. Engineered with a focus on minimizing latency and enhancing signal integrity, the ePHY-5616 is ideal for applications that demand precision and speed. Its architecture is optimized for both copper and optical communications, providing a versatile solution for diverse market needs. ePHY-5616 benefits from eTopus’ advanced DSP techniques, allowing for exceptional scalability over a wide range of data rates and environmental conditions. The inclusion of proprietary algorithms facilitates rapid performance tuning, making it adaptable for enterprise and data center applications, where switching density and reliability are paramount. Its efficient power and thermal characteristics make it particularly suitable for high-density integrations such as servers, routers, and AI storage solutions. Designed to meet rigorous industry standards, the ePHY-5616 delivers consistent performance with a robust Clock Data Recovery (CDR) and low Bit Error Rate (BER). It supports a broad range of protocols, enhancing its applicability within network infrastructures. The ePHY-5616 is an integral component for customers seeking to optimize their systems' performance while reducing overall costs and integration time, offering an efficient blend of speed, reliability, and flexibility.
LDPC (Low-Density Parity-Check) encoders and decoders from Creonic are designed to enhance data transmission reliability in complex communication systems. These IP cores support various standards, including DVB-S2X, 5G-NR, and IEEE 802.11, offering exceptional error correction capabilities essential for high-speed data transfer. Utilizing advanced algorithms, Creonic's LDPC solutions deliver robust performance while minimizing complexity and power consumption. The LDPC encoders and decoders embody state-of-the-art hardware models and bit-accurate software reference models for seamless integration into existing systems. The hardware models are compatible with FPGA platforms from leading manufacturers, ensuring adaptability across different technological environments. Comprehensive test environments accompany the IP cores, facilitating smooth deployment and validation. Creonic’s commitment to quality is evident in the rigorous testing processes each IP core undergoes, guaranteeing compliance with stringent industry standards. The LDPC solutions are available for download from secured servers, reflecting Creonic's focus on security and accessibility for their global clientele.
The ePHY-5607 from eTopus is a high-speed transceiver solution catering to a range of applications, from routers and switches to data centers and AI infrastructures. This product is tailored for environments where space efficiency and performance are crucial, operating at data rates between 1Gbps and 56Gbps. It utilizes a 7nm process node, ensuring that it provides power, performance, and area (PPA) optimization, making it a preferred choice for high-density computing environments. eTopus has infused their advanced DSP technology into the ePHY-5607, ensuring its capability to handle significant BER reduction and maintaining robust clock data recovery mechanisms under challenging conditions. Its design promotes ultra-low latency operations, making it exceptional for tasks demanding rapid data processing and communication. Additionally, the ePHY-5607's environmental adaptability, with superior temperature tracking, enhances its reliability in various application scenarios, including 5G infrastructures. Offering flexible configurations, the ePHY-5607 is distinguished by its ability to function efficiently across different reference clocks, providing versatile deployment options. It is well-suited for mission-critical applications that require a seamless integration of communication solutions, prioritizing low-power consumption while achieving maximum data throughput. The solution is further strengthened by eTopus' comprehensive SDK support, which simplifies integration and deployment challenges, hence broadening its industry applicability.
Trion FPGAs by Efinix are optimized for the fast-paced demands of the edge computing and IoT sectors. Built on a 40 nm process, these FPGAs provide a blend of power-performance-area efficiency suitable for a wide array of innovative applications including mobile, consumer electronics, industrial systems, and more. With logic densities ranging from 4K to 120K logic elements, Trion FPGAs are versatile enough to cater to both standard and burgeoning tech markets. The Trion lineup features a robust set of integrated interfaces including GPIO, PLLs, oscillators, DDR, MIPI, and LVDS, making them adaptable to varied application needs. These attributes, combined with their commitment to low power consumption, render them ideal for wearables, smart devices, and portable imaging systems where space and power efficiency are paramount. In terms of development flexibility, Trion FPGAs are available in a variety of package options, including tiny WLCSP packages designed for compact, integrated applications. With embedded DDR controllers and support for RISC-V processors, these FPGAs provide scalable solutions for building complete systems encompassing video processing, consumer applications, and advanced IoT deployments.
ViaExpert is tailored for intricate via modeling and simulation, offering precise analysis for systems requiring high-fidelity interconnects. As high-speed digital designs become increasingly prevalent, the accurate modeling of vias - essential pathways in an electronic design - becomes critical. ViaExpert provides the tools necessary to evaluate vias' electrical characteristics comprehensively, ensuring designs can accommodate desired performance levels. This tool addresses challenges in high-frequency environments by offering detailed simulations of via structures, facilitating seamless integration with overall circuit designs. The emphasis on accuracy helps designers mitigate potential signal integrity issues, such as reflection and crosstalk, which can arise in complex electronic systems. ViaExpert is particularly suited for engineers seeking precise interconnect modeling to ensure reliability and efficiency in design outcomes. Its advanced simulation capabilities support the creation of resilient and effective electronic systems, valuable for industries where performance cannot be compromised.
M31's SerDes IP caters to high-bandwidth applications with multi-lane support and low power architecture. It supports a versatile range of data rates from 1.25G to 10.3125Gbps, ensuring adaptability across various communication protocols and ensuring seamless data flow in complex systems.
CableExpert focuses on cable harness modeling and simulation, a crucial component in modern electronics where complexity and performance are paramount. By simulating cable behavior, this tool helps designers understand the impacts of physical and electrical constraints on harness performance. Its sophisticated modeling environment allows for the exploration of various configurations to optimize system connections. Through its ability to simulate a variety of cable types, CableExpert helps reduce potential failures by predicting problems like impedance mismatch and signal degradation. This capability is essential in ensuring that cable harnesses meet both performance specifications and reliability requirements, especially in industries such as automotive and aerospace where safety and precision are critical. CableExpert's robust simulation features enable engineers to evaluate and refine cable designs effectively, ensuring seamless integration into larger systems. This tool's comprehensive approach aids in the development of efficient, high-performance harness solutions that meet the rigorous demands of advanced electronic systems.
MeasureExpert is engineered for automated measurement and analysis, providing detailed insights essential for maintaining quality and performance in electronic products. By automating tests and measurements, this tool enables large-scale data management and quick iteration, streamlining the verification phase of electronic design. The tool's capability to handle multiple testing scenarios simultaneously makes it invaluable in ensuring that a product meets the specified requirements before production. MeasureExpert assists engineers by simplifying the testing process, reducing the potential for human error and increasing the efficiency of the quality assurance stage. MeasureExpert's automation prowess supports the production of high-reliability electronic systems, offering detailed analytical feedback that helps refine designs and confirm their readiness for market launch. It is a crucial component of any design cycle focused on high standards of precision and efficiency.
Notus provides a comprehensive platform for SI/PI, thermal, and stress analysis, crucial for engineers striving to optimize electronic circuit performance under various environmental conditions. Integrating signal integrity, power integrity, and multi-physics simulation within a single tool, Notus offers unmatched analytical capabilities that ensure designs meet rigorous operational standards. Designed to tackle complex simulations, Notus helps in identifying potential problems before they become costly failures. Its detailed analyses encompass a range of scenarios, aiding in the prediction and enhancement of circuit reliability and longevity. This integrated approach supports forward-thinking design strategies that are essential in today's competitive electronics marketplace. Notus enhances productivity by simplifying the design process and reducing the need for multiple software tools, thereby accelerating time-to-market. The powerful simulations it provides are indispensable for engineers working on high-stakes projects where precision and reliability are non-negotiable.
The VITA 17.3 Serial FPDP Gen3 Solution represents an advanced iteration of the Serial FPDP protocols, designed to deliver even faster data transfer rates while supporting more extensive feature sets. This solution addresses the need for higher bandwidth in data-intensive operations and is integral to modern communication infrastructures. It supports a maximum throughput that significantly enhances performance benchmarks, essential for real-time data applications. The IP is particularly beneficial in environments where large volumes of data must be moved swiftly and efficiently, such as in signal intelligence and large-scale data acquisition systems. Moreover, the VITA 17.3 Gen3 protocol offers enhanced error-checking capabilities ensuring data integrity even in challenging operating conditions. Its modular design aids in seamless integration and deployment across different platforms, making it a preferred choice for system architects aiming to leverage cutting-edge communication technologies.
Designed for advanced network diagnostics, the 10G Universal Network Probe enables comprehensive traffic monitoring and analysis across OTN and other high-capacity networks. This probe offers versatile compatibility, ensuring streamlined integration into existing infrastructure, a critical function for maintaining high-speed data transmission fidelity and efficiency.
ChannelExpert is a high-speed system simulation platform specifically designed for assessing signal integrity and power integrity in complex electronic architectures. It stands out for its capacity to simulate entire systems, providing comprehensive insights that are invaluable during the design phase of high-frequency, high-speed circuits. This platform caters to the challenges of modern electronic environments where data throughput and speed are critical success factors. By enabling the simulation of various operational scenarios, ChannelExpert assists designers in predicting system behavior accurately, ensuring robust performance and integrity under demanding conditions. ChannelExpert's advanced features include detailed analytical tools that support system optimization, fostering the development of products that can thrive in today's fast-paced technological landscape. It is an essential tool for engineers dedicated to creating high-performance electronic systems with minimal signal interference and maximum throughput.
The SOQPSK-TG LDPC Modulator by IPrium offers superior modulation capabilities, integrating Selectable Offset Quadrature Phase-Shift Keying with Turbo-LDPC coding. This combination is especially beneficial for aerospace telemetry where high efficiency and robustness are required for data transmission over long distances. This sophisticated modulator supports reliable data modulation, essential for maintaining the integrity of data in critical communication paths such as those between spacecraft and ground stations. Its design focuses on achieving high spectral efficiency and power efficiency, optimizing frequency utilization while minimizing power consumption. Spacecraft communications benefit greatly from this modulator due to its error correction performance, contributing to mission safety and success. IPrium's dedication to high-performance standards ensures that this product not only meets but exceeds industry expectations for aerospace communication systems.
The High-Speed SerDes technology offered recognizes the growing demand for efficient chiplet-based interconnects. This product is tailored for high-performance computing and communication systems, providing unmatched signal integrity and minimizing latency. Designed to operate at ultra-high speeds, this SerDes solution supports heterogeneous integration, enabling seamless communication between chiplets. Through its innovative digital-centric architecture, the High-Speed SerDes promises low power consumption, making it ideal for energy-conscious applications. It integrates cutting-edge signal processing techniques that enhance data transmission stability, even at extreme speeds. This focus ensures high performance and reliability, vital for mission-critical applications where flawless data exchange between components is non-negotiable. The technology is compatible with mainstream tech nodes ranging from 12nm to 28nm, offering a broad spectrum of versatility and scalability for customers. Its adoption in chiplet ecosystems supports the evolution towards modular, scalable multi-chip packages, laying the foundation for future-proof high-performance interconnect solutions.
The MimicPro Prototyping System is a high-performance platform designed to elevate the prototyping process for ASICs and pre-silicon software development. Utilizing FPGA technology, it enables rapid development by significantly cutting down both design validation time and rerun efforts. MimicPro provides exceptional system visibility and debugging capabilities that allow developers to efficiently address software bugs without the need for expensive emulation equipment.<br> <br> Scalability is at the heart of the MimicPro System, allowing enterprises to prototype large ASIC families with a flexible setup ranging from 1 to 32 FPGAs. This modular design ensures the system can grow alongside business needs, whether it’s used for AI, vision, processor, communication, or other SoCs. Additionally, built-in security features enable encrypted prototyping, safeguarding user IPs in both cloud and enterprise deployments.<br> <br> The system boasts 120MGates of performance, equipped with a memory analyzer and compiler for enhanced functionality. Local memory debugging further assists in minimizing time-to-market while ensuring product reliability and efficiency. With support for cloud operations and seamless integration with current digital tools, MimicPro stands as a comprehensive solution catering to modern prototyping requirements.
The VITA 17.1 Serial FPDP Solution offers a high-speed digital communication protocol designed for demanding environments. This product provides robust and efficient data transfer capabilities, ideal for applications in aerospace and defense. Featuring a serial point-to-point link, it enables direct communication between systems, minimizing latency and maximizing data throughput. Engineers favor this solution for its scalability and compatibility with existing and emerging technologies, ensuring a secure investment in future-proofing their systems. The VITA 17.1 standard's interoperability with various platforms highlights its versatility, making it suitable for a broad array of mission-critical applications. With support for different data transfer speeds and modes, this solution can be tailored to fit specific requirements, guaranteeing optimal performance under varying operational conditions.
Creonic's demodulation IP cores are central to efficient signal processing in communication systems, addressing the needs of both conventional standards like DVB-S2 and more recent versions such as DVB-S2X. These IP cores decode complex modulated signals robustly, ensuring high-rate data transmission accuracy crucial for applications like satellite communications. The demodulators leverage advanced algorithms to adaptively process signals with minimal distortion and noise, thus maintaining data integrity across long distances and varying conditions. Compatibility with multiple digital modulation techniques is a notable feature, making these cores versatile and highly applicable to diverse communication protocols. Testing and validation at multiple levels are conducted to ensure these cores meet the rigorous demands of modern communication environments. Creonic's dedication to quality and innovation is reflected in their demodulation solutions, making them a trusted choice for reliable, high-performance signal processing.
The InfiniBand SDR Link Layer Core is engineered to offer seamless connectivity across high-speed data networks. It operates at 125 MHz, delivering bidirectional data transfer rates of up to 10Gbits/second. This core is integrated with Xilinx Virtex2P, Virtex4FX, Virtex5, and Altera Stratix2GX FPGAs, and is available for ASIC applications as well. Constructed to perform optimally within lower-speed grade FPGAs, the core excels in maintaining data integrity in rigorous communication environments. The SDR Link Layer Core serves as the foundational element of Polybus's InfiniBand offerings, ensuring reliable data transport in computing and networking infrastructures.
The InfiniBand Transport Layer Core offers a sophisticated solution for high-performance data acquisition and networking tasks. Supporting both DDR and QDR configurations, this core facilitates UC SEND and UC RDMA Write operations, underpinning a wide range of virtual lane and queue pair configurations. With wire speed operations and remarkably low latency, the Transport Layer Core excels in applications demanding rapid data throughput and efficient packet handling. It is particularly advantageous in technologies requiring seamless integration across different data transmission standards, including PCI, Ethernet, FibreChannel, and more.
Creonic's modulation IP cores are crafted to optimize data transmission through sophisticated signal processing. These cores support various specifications, including DVB-S2X, providing efficient modulation capabilities that enhance signal robustness and transmission reliability, essential for wireless communication technologies. Leveraging state-of-the-art algorithms, these modulation cores ensure effective transformation of digital data into signals that can be accurately transmitted through different media channels. The compatibility with a range of hardware architectures underscores their adaptability, which is further facilitated through comprehensive software and hardware models for seamless integration. As with all Creonic products, the modulation cores are subjected to stringent quality checks to assure performance and compliance with global standards. This dedication to excellence ensures Creonic's modulation cores are an exemplary choice for engineers looking to boost efficiency and integrity in data communication systems.
The InfiniBand DDR Link Layer Core is designed to facilitate enhanced data throughput in demanding network operations. Operating at 250 MHz, it achieves two-way data transmission rates of 20Gbits/second, set to accommodate the performance needs of mid-grade FPGAs such as the Xilinx Virtex4FX, Virtex5, and Altera Stratix2GX. The core's implementation requires sophisticated SerDes functionality, making it a suitable choice for applications where data rate and reliability are crucial. The DDR Link Layer Core expands upon the capabilities set by the SDR version, providing a powerful solution for bandwidth-intensive tasks in distributed computing systems.
The QDR version of the InfiniBand Link Layer Core stands at the forefront of high-speed data processing, functioning at 500 MHz in ASIC environments and 250 MHz in FPGA implementations. It supports both 1X and 4X QDR operations, with the capacity for 8X DDR operations in FPGAs. The inclusion of a robust PCS Layer ensures cross-compatibility with high-end FPGA systems such as Altera Stratix5GX, Xilinx Kintex7, and Virtex7. The QDR Link Layer Core is engineered to manage substantial data flows, empowering industries such as data acquisition and telecommunications to achieve optimum throughput in their operations.
The 100G Regenerator/Repeater OTL4.10 is essential in scenarios where signal integrity over long distances is critical. This technology rejuvenates weakened signals, essential for networks aiming to maintain robust data integrity and high-quality communication links, thereby extending the range and reliability of optical networks.
Specialized for telecommunications networks, the SONET/SDH Framer handles the intricate task of framing data streams within high-speed optical networks. This component is designed to support the high reliability and synchronization standards required in modern SONET/SDH infrastructure.
For environments requiring advanced data aggregation and multiplexing at large scales, the 100G Muxponder OTL4.10 provides a sophisticated interface solution. This module is integral to high-speed communication networks, offering functionalities that ensure data flows efficiently across multiple channels.
The 100G Transponder CAUI-10 facilitates seamless optical-to-electrical signal conversion, doubling as an efficient intermediary in high-capacity network systems. These transponders are invaluable for telecommunications setups that demand high data rates and extended reach, providing the necessary tools to manage complex digital signal demands.
Aliathon's 2.5G GFP-F Framer offers a cutting-edge solution for packet framing in next-generation transport networks. It efficiently packages and aligns data for rapid transmission, optimizing bandwidth while minimizing latency, crucial for supporting dynamic communication applications in modern networks.