All IPs > Wireless Communication > 802.16 / WiMAX
The 802.16/WiMAX category in our semiconductor IP catalog offers cutting-edge solutions tailored for robust wireless communication. WiMAX (Worldwide Interoperability for Microwave Access) is a technology based on the IEEE 802.16 standard designed to provide high-speed broadband access over a large area. Semiconductor IPs in this category are essential for developing systems that need to ensure reliable, high-bandwidth connectivity, making them ideal for both urban and rural settings where traditional broadband may not reach.
802.16/WiMAX semiconductor IPs are instrumental in the creation of efficient and scalable networks. They facilitate the transmission of data over long distances without the need for physical cabling, which is particularly advantageous in regions with challenging terrain or sparse infrastructure. This technology supports a range of applications including mobile backhaul, fixed wireless access, and even vehicular network connectivity. Products in this category include baseband processors, radio frequency transceivers, and complete system-on-chip (SoC) solutions that ensure seamless integration with existing communication frameworks.
Developing 802.16/WiMAX solutions involves adopting advanced modulation technologies and multiple input multiple output (MIMO) capabilities, which help in maximizing throughput and spectrum efficiency. The semiconductor IPs available in this category are designed to meet industry standards for performance and reliability, thereby enabling manufacturers to create devices that deliver consistent service quality in various environmental conditions. These IPs are crucial for companies aiming to broaden their market reach by providing high-speed internet access to underserved and unconnected areas globally.
In summary, the 802.16/WiMAX semiconductor IPs category is a vital component for developers looking to harness the potential of broadband wireless technology. By integrating these IPs into their products, companies can offer scalable and efficient connectivity solutions that cater to a wide array of use cases. Whether it's for urban connectivity improvement or expanding access in remote locations, the solutions offered in this category are key to overcoming the digital divide and driving future innovations in wireless technology.
In channel coding redundancy is inserted in the transmitted information bit-stream. This redundant information is used in the decoder to eliminate the channel noise. The error correction capability of a FEC system strongly depends on the amount of redundancy as well as on the coding algorithm itself. TPCs perform well in the moderate to high SNRs because the effect of error floor is less. As TPCs have more advantage when a high rate code is used, they are suitable for commercial applications in wireless and satellite communications. The ntTPC Turbo Product Codec IP core is consisted of the Turbo Product Encoder (ntTPCe) and the Turbo Product Decoder (ntTPCd) blocks. The product code C is derived from two/three constituent codes, namely C1, C2 and optionally C3. The information data is encoded in two/three dimensions. Every row of C is a code of C2 and every column of C is a code of C1. When the third coding dimension is enabled, then there are C3 C1*C2 data planes. The ntTPC core supports both e-Hamming and Single Parity Codes as the constituent codes. The core also supports shortening of rows or columns of the product table, as well as turbo shortening. Shortening is a way of providing more powerful codes by removing information bits from the code. The ntTPCe core receives the information bits row by row from left to right and transmits the encoded bits in the same order. It consists of a row, column and 3D encoder. The ntTPCd decoder receives soft information from the channel in the 2’s complement number system and the input samples are received row by row from left to right. The implemented decoding algorithm computes the extrinsic information for every dimension C1, C2, C3 by iteratively decoding words that are near the soft-input word. An advanced scalable and parametric design approach produces custom design versions tailored to end customer applications design tradeoffs.
Convolutional FEC codes are very popular because of their powerful error correction capability and are especially suited for correcting random errors. The most effective decoding method for these codes is the soft decision Viterbi algorithm. ntVIT core is a high performance, fully configurable convolutional FEC core, comprised of a 1/N convolutional encoder, a variable code rate puncturer/depuncturer and a soft input Viterbi decoder. Depending on the application, the core can be configured for specific code parameters requirements. The highly configurable architecture makes it ideal for a wide range of applications. The convolutional encoder maps 1 input bit to N encoded bits, to generate a rate 1/N encoded bitstream. A puncturer can be optionally used to derive higher code rates from the 1/N mother code rate. On the encoder side, the puncturer deletes certain number of bits in the encoded data stream according to a user defined puncturing pattern which indicates the deleting bit positions. On the decoder side, the depuncturer inserts a-priori-known data at the positions and flags to the Viterbi decoder these bits positions as erasures. The Viterbi decoder uses a maximum-likelihood detection recursive process to cor-rect errors in the data stream. The Viterbi input data stream can be composed of hard or soft bits. Soft decision achieves a 2 to 3dB in-crease in coding gain over hard-decision decoding. Data can be received continuously or with gaps.
ntRSD core implements a time-domain Reed-Solomon decoding algorithm. The core is parameterized in terms of bits per symbol, maximum codeword length and maximum number of parity symbols. It also supports varying on the fly shortened codes. Therefore any desirable code-rate can be easily achieved rendering the decoder ideal for fully adaptive FEC applications. ntRSD core supports erasure decoding thus doubling its error correction capability. The core also supports continuous or burst decoding. The implementation is very low latency, high speed with a simple interface for easy integration in SoC applications.
Lekha Wireless offers a complete suite of WiMAX Software Stacks compliant with the IEEE 802.16e standard, suitable for both Mobile Station (MS) and Base Station (BS) deployment over SDR platforms. These stacks provide critical support for both PHY and MAC layers, available for licensing as platform-independent ANSI C code, or tailored for Intel-based DSP SoCs. The stacks have been implemented in diverse network configurations, interacting fluidly with third-party solutions and having undergone rigorous compatibility and certification processes. They are designed to support a range of applications including rural broadband, smart grid communications, and AeroMACS for airport management systems. By offering flexibility and proven interoperability, the WiMAX stacks facilitate the deployment of networks in challenging environments, ensuring reliable communication in industries like oil and gas and renewable energy. Lekha's extensive experience in WiMAX technology guarantees a high level of support for customers seeking certification and seamless deployment.
ntRSE core implements the Reed Solomon encoding algorithm and is parameterized in terms of bits per symbol, maximum codeword length and maximum number of parity symbols. It also supports varying on the fly shortened codes. Therefore any desirable code-rate can be easily achieved rendering the decoder ideal for fully adaptive FEC applications. ntRSE core supports continuous or burst decoding. The implementation is very low latency, high speed with a simple interface for easy integration in SoC applications.
