All IPs > Security IP > Cryptography Cores
In today's interconnected world, the importance of secure communication and data protection cannot be overstated. Cryptography cores are a crucial subset of semiconductor IPs designed to provide foundational security solutions across a variety of electronic systems. At their core, these IPs implement complex algorithms that ensure the confidentiality, integrity, and authenticity of data being processed and exchanged.
The cryptography cores available in this category offer a diverse range of features tailored to different security needs. From symmetric-key algorithms like AES to asymmetric-key systems such as RSA and ECC, these cores ensure that systems can securely encrypt and decrypt information, protecting it from unauthorized access and tampering. By embedding these cryptographic functions directly into hardware, it becomes possible to achieve faster processing speeds and higher levels of security compared to software implementations.
These semiconductor IPs are widely used in applications where data security is paramount. This includes, but is not limited to, industries such as finance, telecommunications, and healthcare. Devices utilizing cryptography cores can range from secure payment systems, ensuring safe financial transactions, to mobile devices for secure communications, to medical devices that safeguard sensitive health information. Additionally, with the rise of the Internet of Things (IoT), cryptography cores are increasingly crucial in providing secure connections for a myriad of smart devices.
By integrating cryptography cores into your designs, you not only improve security but also future-proof your products against many potential vulnerabilities. As security threats continue to evolve, having robust cryptography solutions is essential for maintaining trust and reliability in your products and services. Whether you're developing a new application or enhancing an existing one, our category of cryptography cores offers the semiconductor IP solutions you need to meet today's stringent security demands.
Overview: Cybersecurity IPs offer a range of essential security features to protect your digital assets and sensitive information. From True Random Number Generators (TRNG) to advanced encryption algorithms like AES, DES, 3DES, and cryptographic hash functions like SHA, as well as RSA for secure key exchange and digital signatures, the IPs provide a comprehensive suite of tools to safeguard your data. Key Features: True Random Number Generator (TRNG): Generates unpredictable and unbiased random numbers for cryptographic applications. Advanced Encryption Standard (AES): Provides robust encryption with symmetric key algorithms for securing data. Data Encryption Standard (DES) and Triple DES (3DES): Implement legacy encryption algorithms for data protection. Hash Functions: Includes secure cryptographic hash functions like SHA (Secure Hash Algorithm) for data integrity verification. RSA: Enables secure key exchange, encryption, and digital signatures for secure communication. These cybersecurity IPs are designed to meet the stringent security requirements of modern applications, ensuring the confidentiality, integrity, and authenticity of your data.
PUFrt is a hardware-based root of trust solution that integrates seamlessly into a variety of semiconductor environments. It features a comprehensive security foundation with a 1024-bit Physical Unclonable Function (PUF) and a true random number generator compliant with NIST SP800-90B/SP-800-22 standards. This solution provides a robust platform for key generation and storage, ensuring sensitive data never leaves the chip. With built-in anti-tamper design and an 8k-bit secure storage space, PUFrt is capable of safeguarding vital data against physical attacks. Designed for flexibility, it supports multiple cryptographic operations and integrates easily into various architectures, providing a fortified base for semiconductor security, vital for applications such as secure boot and trusted execution environments.
Creonic offers a diverse array of miscellaneous FEC (Forward Error Correction) and DSP (Digital Signal Processing) IP cores, catering to various telecommunications and broadcast standards. This collection of IP cores includes highly specialized solutions like ultrafast BCH decoders and FFT/IFFT processors, which are critical for managing high-throughput data streams and maintaining signal fidelity. These IP cores embody the latest in processing technology, delivering precise error correction and signal transformation functions that are essential in complex communication networks. Their integration capabilities are made easy with detailed hardware specifications and software models, designed for flexibility across different platforms and applications. The rigorous development process guarantees that each core adheres to market standards, optimizing performance and ensuring operational reliability. Creonic's portfolio of miscellaneous FEC and DSP cores stands out for its innovative contributions to digital communications, providing unique solutions that meet the sophisticated requirements of modern connectivity.
PUFcc stands as a state-of-the-art crypto coprocessor, embedding a robust hardware root of trust with a complete suite of cryptographic algorithms essential for securing modern devices. It unites essential elements such as key generation, storage, and a comprehensive crypto engine into one cohesive package. Noteworthy for its adaptability, PUFcc is designed to effortlessly integrate into numerous system architectures, supporting applications across IoT, automotive, and FinTech industries. It provides crucial security features including secure boot, over-the-air updates, and advanced key management capabilities. The suite of NIST CAVP and OSCCA certified algorithms within ensures a high degree of trust and compliance, crucial for maintaining secure communications and data integrity throughout the product lifecycle.
Creonic's Turbo encoders and decoders provide powerful forward error correction techniques applicable in wireless communication systems, including 4G LTE and DVB-RCS2. Known for the efficiency in managing bandwidth and minimizing data loss, these IP cores are designed to boost communication integrity and performance. Leveraging sophisticated iterative algorithms, Turbo encoders and decoders execute precise error detection and correction with high data throughput. They are crafted to integrate seamlessly into various hardware platforms, with detailed hardware models and software reference models available for easy incorporation into any system. This versatility ensures that Creonic's Turbo solutions are suitable for both new and existing infrastructures. Quality assurance remains a cornerstone for these products, with each IP core undergoing extensive validation to meet demanding specifications. By addressing critical needs in modern communication systems, Creonic’s Turbo offerings continue to be a preferred choice for engineers and developers striving for reliability and efficiency.
Secure OTP is an advanced storage solution utilizing anti-fuse one-time programmable (OTP) memory to protect sensitive data in integrated circuits. With enhanced capabilities over standard OTP systems, Secure OTP offers a unique physical macro and digital RTL design that ensures maximum security for stored data, be it in use, transit, or rest. It features a 1024-bit PUF for improved encryption and supports multiple interfaces for seamless integration across a broad range of applications. The solution mitigates security vulnerabilities in modern chip designs, providing robust protection against data theft and unauthorized access to critical information such as encryption keys and boot codes. This technology is aimed at applications requiring secure data storage, including IoT devices and smart electronics.
Tiempo Secure's True Random Number Generator (TRNG) is a cryptographic IP core designed to infuse high levels of security in digital systems. This module is vital for generating unpredictable random numbers used across various cryptographic functions such as key generation, encryption, digital signatures, and more. The TRNG is crafted to adhere to the highest standards of randomness and security as outlined by NIST and AIS31 test suites. It supports crucial protocols in secure communications like IPsec, MACsec, and TLS/SSL while providing raw data access for AIS31 characterization and incorporating comprehensive health tests. With its ability to integrate seamlessly into existing designs, the TRNG stands as a critical element for enhancing system security. Its implementation includes wrappers for standard buses such as APB and AXI, ensuring compatibility and ease of integration into existing SoC architectures. The TRNG is a cornerstone for secure device operation, ensuring that cryptographic operations maintain their integrity and randomness, thereby safeguarding against potential security breaches in the system.
Polar encoders and decoders by Creonic serve as vital components in enhancing data integrity for next-generation communication frameworks such as 5G. These IP cores are designed to deliver superior coding efficiency and robust performance in varied network conditions, supporting high-speed data transmissions while maintaining low latency. The technology stands out for its innovative use of polar codes, noted for their capacity to achieve channel capacities effectively. Creonic's Polar solutions include hardware and software models tailored for straightforward integration into diverse computational environments. They provide excellent adaptability and scalability across multiple hardware systems, making them ideal for cutting-edge digital communication networks. Backing their robust technological framework, Creonic ensures that each product adheres to strict industry standards through comprehensive testing and quality assurance. The result is a set of highly reliable Polar encoders and decoders designed to enhance the performance and efficiency of advanced communication systems.
Tiempo Secure's Post-Quantum Cryptography (PQC) is designed to offer protection against emerging quantum computing threats, ensuring that cryptographic systems remain secure in the future. This cryptographic solution integrates advanced algorithms that are resilient to quantum attacks, providing a robust next-generation security layer. Key components of the PQC offering include quantum-resistant code signatures, key encapsulation mechanisms, and digital signatures, leveraging advanced algorithms such as the Leighton-Micali Hash-Based Signature Scheme, Crystals-Dilithium, and Crystals-Kyber. These mechanisms are engineered to provide future-proof security, aligning with evolving cryptographic requirements. Tailored for adaptability, PQC ensures dependable security through architecture-ready, hardware-accelerated algorithms that fit into various digital systems. This adaptability makes it suitable for applications seeking enhanced protective measures against quantum threats. With PQC, Tiempo Secure offers a forward-looking approach to securing digital assets, ensuring they are safeguarded from the potential risks posed by quantum computing advancements. This makes it an essential component for modern security strategies, providing peace of mind in a fast-evolving technological landscape.
The PSA Compliant Crypto API by Tiempo Secure offers a streamlined interface for implementing cryptographic functions, ensuring robust digital security. It is a comprehensive package that simplifies cryptographic operations while adhering strictly to the Platform Security Architecture (PSA) benchmarks. Engineered for efficiency, the API provides a software library supporting both Physical Unclonable Functions (PUFs) and a True Random Number Generator with Deterministic Random Bit Generator (TRNG+DRBG). Its design ensures minimal on-chip SRAM usage, occupying only a few kilobytes, ideal for space-constrained environments. Platforms integrating this API can achieve the prestigious 'PSA Certified Storage' status, proving compliance with stringent standards. Its extensive logging options, highly optimized SHA-256, and adherence to MISRA C standards make it a robust choice for enhancing system security. This API enables secure storage of arbitrary keys using SRAM PUFs and supports the generation of 256-bit true random seeds, vital for secure operating environments. It simplifies complex security functions, making it an ideal choice for enhancing system protection across various platforms.
The AES Encrypt/Decrypt 128/192/256 offering from Secantec presents a secure, efficient encryption solution catering to a wide array of security-critical applications. This IP provides flexible encryption levels, supporting 128, 192, and 256-bit key lengths. One of its standout features is the parallel processing of key calculation and data encryption, significantly reducing the number of clock cycles needed. Operating on an 8-bit primitive polynomial in the Galois Field, this asynchronous design underscores both power efficiency and low-latency performance. The encryption/decryption process is nimble, capable of completing within a single clock cycle if conditions are optimized. Targeting areas with stringent security needs, this encryption IP finds use in sectors demanding robust data protection mechanisms, including secure communications and sensitive data transmission. The architecture's flexibility and verified RTL ensure adaptability across various implementation environments.
SphinX provides industry-standard encryption and decryption using high-performance, low-latency AES-XTS technology. Its design features independent, non-blocking encryption and decryption channels, ensuring data security is maintained without impeding processing speed or system throughput. SphinX is tailored for environments where data protection is paramount, delivering robust security capabilities while preserving system efficiency and performance.
FortiCrypt offers a comprehensive lineup of AES solutions, explicitly engineered for robust defense against side-channel attacks (SCA) and fault injection attacks (FIA), including variants like SIFA. Highlighting exceptional performance, these solutions employ masking techniques based on finite field arithmetic. These mechanisms ensure encryption and decryption processes are secure, while maintaining impressive speeds without additional latency. Balancing high security, low gate count, and power consumption, FortiCrypt products are available in configurations focusing on performance, power efficiency, or compact design options. With TVLA methodology verification and Common Criteria accreditations, FortiCrypt products are designed to thrive in even the most vulnerable situations. The suite supports ultra-high performance, ultra-low power efficiency, significant gate count reduction, and satisfies diverse industrial needs, making it applicable for both high-end and existing field devices vulnerable due to insufficient original protections. Moreover, FortiCrypt can be utilized with AMBA, AXI, or APB buses, offering a hardware-software solution integrated into diverse circuit architectures, thus ensuring comprehensive compatibility and security across systems.
The SHA-2 Crypto Engine from Tiempo Secure delivers advanced hashing functionality that is pivotal for ensuring data integrity and security in various applications. This IP core stands out for its efficient processing capabilities, supporting hashing functions like SHA-256 and SHA-224. Designed with a 1 cycle per round architecture, the SHA-2 Crypto Engine supports both the import and export of SHA-256 states, catering to even the most complex cryptographic operations. Its ability to handle any message length with bit granularity makes it versatile for wide-ranging applications. Internal padding is seamlessly handled within the IP, and for ease of integration, it comes with wrappers for standard buses such as APB and AXI. This ensures it fits well into a plethora of existing designs, making it a reliable choice for implementing digital signatures and data integrity checks. A unique feature of the SHA-2 Crypto Engine is its readiness to handle pre-padded payloads, optimizing processing without compromising on performance. It empowers developers to boost their system's security robustness while benefiting from an optimized silicon resource-to-performance ratio.
Tiempo Secure's SHA-3 Crypto Engine is an advanced cryptographic module that offers exceptional flexibility and performance for modern security needs. Emphasizing scalability, the engine supports varying numbers of hashing rounds per clock cycle, optimizing the silicon resource usage while ensuring high throughput. One of the key features is the ability to select between fixed-length and extendable-output functions (XOF) for each message, catering to diverse application requirements. This flexibility is easily manageable through simple configuration settings, making it adaptable to specific needs. Internally, the SHA-3 engine manages message padding and allows for efficient import/export of the KECCAK-p state. The architecture is designed for integration simplicity, featuring wrappers compatible with standard bus protocols like APB and AXI, facilitating smooth incorporation into a myriad of systems. In addition to supporting SHA-3 standard functions, it accelerates the Kangaroo Twelve algorithm, offering a comprehensive suite of cryptographic tools for enhanced data security and integrity across various applications.
The THOR Toolbox provides a multifaceted platform for NFC and UHF connectivity, tailored for a wide range of IoT applications. It contains high-precision NFC components optionally combined with UHF for diverse data transfer capabilities, allowing for secure identification processes. This adaptability across multiple protocols makes it a valuable tool for capturing data and providing early-stage design validation for emerging technologies. Incorporating a robust temperature sensor, THOR measures environmental conditions with high accuracy, which is critical in industrial settings. It supports external sensor interfacing through analog and digital connections, providing flexibility in data acquisition. The toolbox also includes encryption features to ensure data integrity and security, making it ideal for applications requiring stringent data management, such as medical devices. Tailored for sectors facing rigorous demands like the industrial and medical markets, THOR's efficient memory storage and configurable data logging offer scalable solutions across safety, logistics, and healthcare monitoring domains. By enabling rapid development and deployment demonstrations, it significantly accelerates project timelines from concept to completion.
The Cramium Personal Hardware Security Module (PHSM) represents Crossbar's commitment to enhancing security at the hardware level, leveraging its highly efficient ReRAM technology. This module serves as a secure enclave within devices, protecting sensitive information from unauthorized access and potential attacks. By employing Crossbar's ReRAM-based PUF (Physical Unclonable Function) cryptographic keys, the PHSM ensures that each device has a unique digital fingerprint, preventing cloning and adding a robust layer of security. The PHSM is designed to address the growing security concerns in modern electronic devices, especially in sectors like automotive, industrial, and medical industries where data integrity is paramount. With its ability to handle extensive security protocols and encryption methods, the PHSM is crucial for safeguarding data in connected devices, providing secure authentication, and ensuring data confidentiality and integrity. Crossbar's technology allows for the seamless integration of the PHSM into existing semiconductor processes, enhancing security without compromising on device performance or energy efficiency. Moreover, the PHSM offers a highly reliable and tamper-resistant solution that can withstand a variety of environmental conditions. Whether it's for securing IoT endpoints, mobile computing platforms, or large-scale data centers, the PHSM is equipped to handle the demands of modern security requirements efficiently and effectively. Its deployment within a device's architecture ensures that sensitive operations remain isolated and protected, providing peace of mind in an increasingly connected world.
FortiPKA-RISC-V serves as a powerful public key accelerator for handling extensive cryptographic computations, which traditional CPUs struggle with. It is crafted to offload heavy computational tasks from the main processor, thereby optimizing performance and resource efficiency. By avoiding cumbersome data transformation processes, FortiPKA-RISC-V underscores its superior operational speed over other solutions, while being optimal in size and energy consumption. Its cryptographic algorithms are implemented in firmware executed via an embedded RISC-V core, with extended support for custom arithmetic operations, making it versatile across applications that demand high-efficiency cryptographic processing. Moreover, it offers hardware configuration options that balance between performance and resource utilization tailored for specific applications. Supporting an array of cryptography standards, such as RSA and elliptic curve algorithms, and equipped with features for robust defense against side-channel and fault injection attacks, FortiPKA-RISC-V is adaptable to diverse cryptographic environments and requirements. Whether integrated into networks, communications, or IoT devices, it delivers outstanding reliability and security across platforms.
LDPC (Low-Density Parity-Check) encoders and decoders from Creonic are designed to enhance data transmission reliability in complex communication systems. These IP cores support various standards, including DVB-S2X, 5G-NR, and IEEE 802.11, offering exceptional error correction capabilities essential for high-speed data transfer. Utilizing advanced algorithms, Creonic's LDPC solutions deliver robust performance while minimizing complexity and power consumption. The LDPC encoders and decoders embody state-of-the-art hardware models and bit-accurate software reference models for seamless integration into existing systems. The hardware models are compatible with FPGA platforms from leading manufacturers, ensuring adaptability across different technological environments. Comprehensive test environments accompany the IP cores, facilitating smooth deployment and validation. Creonic’s commitment to quality is evident in the rigorous testing processes each IP core undergoes, guaranteeing compliance with stringent industry standards. The LDPC solutions are available for download from secured servers, reflecting Creonic's focus on security and accessibility for their global clientele.
The FortiMac IP core is developed to deliver secure HMAC SHA2 implementations, offering substantial protection against side-channel and fault injection attacks. Utilizing the robust Threshold Implementation (TI) paradigm, FortiMac ensures that even the most sophisticated attacks are unable to compromise its security features. This protection robustness has been validated both through analytical methods and real-world physical device testing. FortiMac's standout feature is its unprecedented security, which answers the requirements of today’s rapidly evolving threat landscapes. This IP can be harnessed in both hardware and software configurations, extending its usability to various critical and non-critical applications, unrestricted by conventional design limitations. It's the only solution of its type in the market, setting a high bar for hardware security implementations. FortiMac is integral in securing applications where safeguarding against SCA and FIA is paramount, especially vital in sectors targeting optimal performance and high-security integrity.
Post-Quantum Cryptography IP addresses the emerging challenges presented by quantum computing threats. This IP includes hardware accelerators that are prepared for lattice-based algorithms, ensuring strong defense capabilities against future cyber threats. It is designed for configurable performance, offering tunable power and area efficiency, which is essential for maintaining security standards as quantum computing evolves. This solution is tailored to secure cryptographic operations, ensuring data remains protected amidst advancements in computational technologies.
DolphinWare IPs is a versatile portfolio of intellectual property solutions that enable efficient SoC design. This collection includes various control logic components such as FIFO, arbiter, and arithmetic components like math operators and converters. In addition, the logic components span counters, registers, and multiplexers, providing essential functionalities for diverse industrial applications. The IPs in this lineup are meticulously designed to ensure data integrity, supported by robust verification IPs for AXI4, APB, SD4.0, and more. This comprehensive suite meets the stringent demands of modern electronic designs, facilitating seamless integration into existing design paradigms. Beyond their broad functionality, DolphinWare’s offerings are fundamental to applications requiring specific control logic and data integrity solutions, making them indispensable for enterprises looking to modernize or expand their product offerings while ensuring compliance with industry standards.
eSi-Crypto offers a robust suite of encryption and authentication solutions designed for ASIC and FPGA implementations. Characterized by low resource usage and high throughput, this cryptographic IP includes True Random Number Generators (TRNGs) that are compliant with NIST standards and can be integrated as a hard macro in the target technology. The IP supports several algorithms, such as CRYSTALS Kyber, CRYSTALS Dilithium for post-quantum cryptography, and widely used standards like RSA and AES, facilitating secure communication across diverse applications. It is compatible with AMBA APB/AHB as well as AXI bus interfaces, making it a versatile choice for sophisticated security needs.
The Securyzr iSSP is a holistic security lifecycle management solution that integrates secure services across all phases of a device's existence. It allows for seamless provisioning, firmware updates, security monitoring, and device identity management in a zero-touch manner. This platform facilitates efficient management and extensive security oversight, empowering enterprises to handle security change implementation smoothly.
The AES (standard modes) product from Helion offers a robust encryption solution featuring the Advanced Encryption Standard (AES) algorithm, a 128-bit block cipher known for its efficiency and security. With key sizes of 128, 192, and 256 bits, the AES algorithm complies with NIST standards and is recognized globally for securing sensitive information. This product caters to applications necessitating rapid data processing and heightened security, such as in IPsec, wireless communication, and storage encryption. Helion's AES cores are crafted to deliver optimal performance across a vast array of settings, including both ASIC and FPGA implementations. The cores are designed with scalability in mind, accommodating applications from minimal data rates up to multi-gigabit transmission speeds. Thanks to their architecture, these cores maintain high usability, enabling easy adoption and integration into user systems without excessive resource allocation. Helion's AES suite includes numerous versions tailored to meet varying data transmission needs, ensuring adaptability in resource-constrained environments. Users benefit from the choice of low-power, space-efficient, and high-speed solutions, supporting a wide range of encryption requirements. These cores are also compatible with an array of programmable technologies, reaffirming their utility across diverse platforms, from commercial applications to government-level data protection setups.
The Dynamic Neural Accelerator II (DNA-II) by EdgeCortix represents a new leap in neural network processing. This IP core is exceptionally efficient and provides scalable performance by reconfiguring runtime interconnects between its computing units. Supporting both convolutional and transformer models, DNA-II is tailored for edge AI tasks that demand high parallel processing. The modular DNA-II stands out by enhancing parallelism and optimizing on-chip memory bandwidth usage. Its symbiotic relationship with software solutions like the MERA compiler boosts its efficacy in deploying neural networks across varied applications, from smart cities to automotive systems.
PQPerform Lattice is developed for applications demanding high-speed cryptographic performance, providing an all-in-one solution engineered for high-throughput requirements. It seamlessly fits into network hardware and HSMs (Hardware Security Modules) settings that necessitate rapid digital signature and key exchange processing. This post-quantum processor is optimized for maximum compatibility with Linux systems.
With PQPlatform Lattice, PQShield extends lattice-based cryptography capabilities for hardware implementations requiring post-quantum security. This engine provides minimal-area solutions with side-channel protection, suitable for embedded devices. Integrated with SHA-3, this platform is aligned with NIST standards and is optimal for systems demanding small area deployment with robust security.
The AES Encryption for RFID applications is engineered to provide robust security for data in RFID communications. Utilizing Advanced Encryption Standard (AES) techniques, it offers a secure and efficient mechanism for protecting sensitive information transmitted in RFID systems. This encryption solution is ideal for applications where data integrity and confidentiality are paramount, protecting against unauthorized access and ensuring secure wireless transactions.
The 100 Gbps Polar Encoder and Decoder from IPrium is a high-speed solution designed to meet the needs of ultra-fast data transmission networks. Polar coding, known for its capacity-achieving attributes, ensures that data can be transmitted reliably even near the channel capacity limit. This encoder and decoder pair excels in providing comprehensive error correction capabilities while accommodating substantial data rates, essential for cutting-edge telecommunication networks and data centers. By implementing sophisticated polar codes, these cores manage to minimize error rates, enhancing overall communication fidelity. With applications spanning from 5G networks to data-intensive server environments, the 100 Gbps Polar Encoder and Decoder is a versatile tool for future-proofing network infrastructure. By utilizing this technology, IPrium combines high throughput with reliable error correction, catering to the evolving demands of modern digital communication frameworks.
SASCrypt: Cryptographic for Substation Automation Systems provides advanced security solutions tailored for the critical infrastructure of substation automation. This product ensures that data integrity, confidentiality, and authenticity are maintained across vital communications within power systems. Utilizing robust cryptographic techniques, SASCrypt protects against unauthorized data access and tampering, vital in substation environments where security breaches can lead to significant operational disruptions. It integrates seamlessly with existing systems, ensuring a streamlined enhancement to security protocols without necessitating major infrastructural overhauls. This cryptographic solution is a critical component in maintaining the secure operation of automated substations, providing peace of mind with its rigorous adherence to security standards. Its deployment ensures that sensitive data transmitted across networks remains uncompromised, safeguarding power transmission and distribution operations.
MACSec IP by CoMira Solutions is designed to safeguard network communications by implementing Media Access Control Security as defined by IEEE standards. By using a unique time-division multiplexed cut-through architecture, the MACSec IP ensures secure and efficient data transfer within local area networks. It supports a wide range of configurations including custom security associations and supports multiple ports for simultaneous data protection, thereby making it adaptable to diverse network topologies and security requirements.
This platform provides a full-stack cryptographic subsystem, independent of the main processor, for secure execution of cryptographic tasks. PQPlatform SubSys handles key establishment and signature processes using post-quantum algorithms. It features integral memory and an independent CPU to offload cryptographic loads from the host system, establishing a secure boundary for critical operations.
The DAES is a sophisticated cryptographic processor core, expertly crafted to implement the Rijndael encryption algorithm, commonly known as Advanced Encryption Standard (AES). This processor strengthens system security through its ability to handle varying levels of encryption with support for 128-bit and 256-bit key lengths. This versatility enables it to secure a wide range of applications, from consumer electronics to complex data centers where robust encryption is paramount. This cryptographic processor seamlessly bridges to widely used bus architectures, including APB, AHB, and AXI, ensuring broad compatibility with contemporary SoC designs. The DAES core also supports several block cipher modes such as ECB, CBC, CFB, OFB, and CTR, providing a flexible framework for encryption operations across different domains. Its internal key expansion module enhances encryption operations by allowing swift transitions and minimal resource utilization, crucial for systems requiring frequent key changes. Besides its encryption capabilities, the DAES processor excels in performance and efficiency, enabling rapid processing of cryptographic tasks without compromising security. Its architecture and design facilitate easy integration, allowing engineers to deploy secure solutions quickly in diverse electronic ecosystems. By addressing the ever-growing demand for effective data protection mechanisms, the DAES core plays a vital role in safeguarding sensitive information across myriad applications.
Helion's SHA hashing cores offer powerful solutions for secure data verification needs, featuring implementation of widely recognized hash functions such as SHA-1 and the SHA-2 family, which includes SHA-224, SHA-256, SHA-384, and SHA-512. These one-way cryptographic functions generate fixed-length message digests for data verification, ensuring data integrity and authentication in digital signatures, security protocols like IPsec, and TLS/SSL. These cores are built to cater to different processing demands, providing both high-performance and resource-efficient options. For applications that require rapid processing with minimal area impact, Helion's FAST hashing core family achieves data rates up to 4Gbps. Alternatively, their TINY hashing core family is designed to handle low power and data rate applications, making it suitable for less demanding environments with space constraints. Helion's SHA hashing solutions are versatile, supporting various platforms including Xilinx, Altera, and Microsemi FPGAs, as well as ASIC implementations. Their efficient architecture ensures ease of integration without compromising on performance, catering to a range of applications from simple data integrity checks to complex cryptographic procedures.
The iShield Key by Swissbit stands out as a robust hardware security solution designed to protect digital identities. It supports features like Personal Identity Verification (PIV), and enables one-time password (OTP) generation with HOTP and TOTP protocols. This flexibility makes it suitable for a wide range of authentication applications, significantly reducing the risk of account breaches through multifactor authentication techniques that combat threats such as phishing and social engineering. Designed to plug directly into USB ports, this device offers a simple yet secure way to add hardware security layers to existing systems.
Designed for memory-constrained applications, PQCryptoLib Embedded extends the capabilities of PQCryptoLib to environments like microcontrollers and IoT devices. This specialized library emphasizes configurability to optimize for minimal binary size and memory usage, essential in constrained computing environments. It offers secure post-quantum cryptographic algorithms suited for devices where resource allocation is a challenge.
SFA 100 is an advanced solution optimized for edge IoT data processing. It is designed to handle real-time data inputs efficiently, which is essential in IoT applications where quick response times are crucial. The integration capabilities ensure seamless interconnectivity with existing systems, expanding the scope and functionality of IoT networks. Furthermore, it emphasizes low power consumption and high-performance metrics to enable prolonged operational periods without compromising processing speed. The SFA 100 supports a robust architecture that combines powerful processing with minimal latency. This architecture enables smart data analytics right at the edge, reducing the need to send all data back to centralized servers. As a result, it helps in decreasing bandwidth usage and latency, offering immediate insights and actions, which is particularly beneficial in industrial IoT setups. It also includes advanced security features to safeguard sensitive data from potential breaches, making it ideal for use in environments where data integrity and confidentiality are paramount. These features are complemented by its ability to adapt to varying data loads and processing requirements, making the SFA 100 a versatile choice for different IoT applications.
The SOQPSK-TG LDPC Modulator by IPrium offers superior modulation capabilities, integrating Selectable Offset Quadrature Phase-Shift Keying with Turbo-LDPC coding. This combination is especially beneficial for aerospace telemetry where high efficiency and robustness are required for data transmission over long distances. This sophisticated modulator supports reliable data modulation, essential for maintaining the integrity of data in critical communication paths such as those between spacecraft and ground stations. Its design focuses on achieving high spectral efficiency and power efficiency, optimizing frequency utilization while minimizing power consumption. Spacecraft communications benefit greatly from this modulator due to its error correction performance, contributing to mission safety and success. IPrium's dedication to high-performance standards ensures that this product not only meets but exceeds industry expectations for aerospace communication systems.
Yuzhen 600 is an advanced RFID chip designed to enhance logistics and inventory management with its high precision and efficiency. T-Head's Yuzhen 600 features cutting-edge RFID technology that allows accurate tracking and communication over extended ranges while maintaining low power consumption. This RFID chip is built to operate efficiently within complex industrial environments, offering reliable data transmission and storage capabilities. Ideal for real-time inventory tracking, the Yuzhen 600 provides robust support for supply chain management, significantly streamlining operations. Enhanced with T-Head's proprietary technology, the Yuzhen 600 outperforms typical RFID solutions in terms of signal strength and durability, thus ensuring precise operation even in challenging conditions. Its integration capacity with existing systems enables seamless adoption and optimization of logistics operations.
The Keccak Hash Engine stands out for its versatility and function beyond traditional hashing. Renowned primarily for cryptography, it encompasses authentication, encryption, and pseudo-random number generation. At its core lies the Keccak-f cryptographic permutation, employing sponge construction for adaptability and configurability. Keccak's flexibility allows customization for varied hash outputs and security levels, adhering to standards like 3GPP TS 35.231 and NIST's FIPS 202. Thoroughly analyzed and publicly scrutinized, this engine is an epitome of secure and reliable cryptographic functions. Designed with ease of integration and extensive verification, it fits seamlessly into restrictive environments. It can be tailored for unique outputs, ensuring it meets the specific demands of diverse applications, from blockchain to secure communications.
Comcores' MACsec Core is engineered to fortify Ethernet networks with robust encryption and security measures, ensuring data remains protected across various network segments. This IP core features a streamlined and compact design, reducing resource consumption by up to five times, without sacrificing efficiency. Ideal for integration into both high-performance and resource-constrained environments, the core seamlessly encrypts data packets, safeguarding them from unauthorized access and tampering. Its adaptability ensures it can meet varied security demands in progressively digital landscapes.
PQCryptoLib is a comprehensive cryptographic library offering support for the latest post-quantum and classical algorithms. Certified under FIPS 140-3, this library is central to offering crypto-agility and protecting against potential 'harvest-now, decrypt-later' attacks. PQCryptoLib provides a secure API for integrating hybrid solutions within TLS 1.3. Its primary aim is to aid organizations in transitioning to quantum-resilient infrastructures seamlessly.
Crossbar’s ReRAM Secure Keys technology harnesses the potential of ReRAM to create highly secure cryptographic keys essential for safeguarding electronic devices and systems. By employing Physical Unclonable Function (PUF) technology, these keys provide unique digital identifiers that significantly enhance security measures, preventing unauthorized cloning and access to sensitive data. ReRAM PUF keys are uniquely advantageous due to their high randomness, low error rates, and resilience against environmental variability. This makes them far superior to traditional SRAM-based PUF technologies, which often suffer from greater susceptibility to various attack vectors. ReRAM’s integration into semiconductor hardware ensures that security measures such as encryption keys remain robust and isolated, thereby protecting critical operations. These cryptographic keys are ideal for a plethora of security-sensitive applications, including automotive, data centers, and IoT. By embedding ReRAM PUF keys into device security architectures, manufacturers can bolster the resilience of their products against both physical and digital threats. This technology is particularly potent for implementations within nodes smaller than 28nm, where traditional embedded non-volatile memory is less feasible. Crossbar’s Secure Keys solution represents an essential advance in maintaining data confidentiality and authenticity across a wide range of modern electronic systems.
Vivid Engineering's Thermal Noise-based Random Bit Generator is a specialized component generating random bits at frequencies between 0.2 to 2 MHz. It operates with a typical quiescent current of just 50 µA, ensuring minimal power consumption. This component is designed to leverage inherent thermal noise to produce reliable random sequences, serving crucial roles in security applications and systems requiring stochastic bit streams.
The DSHA2-256 is an advanced cryptographic co-processor core, meticulously engineered to optimize the SHA2-256 hash function. It implements a universal solution with bus bridge capabilities to APB, AHB, and AXI buses, promoting flexibility in integration. Its compliance with the FIPS PUB 180-4 standard and RFC 2104 enhances its reliability, ensuring robust cryptographic performance across various applications. The processor supports both SHA2 224-bit and 256-bit modes, making it adaptable to numerous security requirements. Underlying the DSHA2-256 is a focus on efficient cryptographic processing, where high-speed computation of hash values is crucial for secure data handling and protection. Its architecture is designed to accelerate hash operations significantly, which makes it ideal for systems where large data streams require rapid and secure processing. The core's integration capabilities further allow seamless incorporation into system designs, supporting comprehensive application scenarios in security-focused sectors. The core also features native HMAC (Hash-based Message Authentication Code) support, enhancing secure message verification processes. This capability ensures that data authenticity and integrity are maintained, adding another layer of security to systems deploying the DSHA2-256. With the increasing demand for secure computing environments, this cryptographic co-processor stands as a vital component for products requiring enhanced data security and encryption capabilities.
The Swissbit iShield HSM acts as a critical security anchor in IoT environments, offering robust hardware protection for sensitive keys used in device authentication and registration. This plug-and-play USB security module is vital for enhancing IoT designs that rely on hardware security to prevent key duplication or exposure in software-based environments. Its design facilitates seamless upgrades of existing IoT infrastructure with advanced security modules without the need for redesigning hardware. Capable of securely storing private key and certificate information, the iShield HSM ensures that sensitive cryptographic elements remain shielded from potential cyber threats. It's especially valuable for updating AWS IoT Greengrass devices, where hardware security can significantly bolster system resilience. Its high compatibility across platforms encourages wide adoption by offering seamless integration into diverse IoT setups.
PQPlatform CoPro consolidates high-performance hash and lattice-based cryptography in one entity, specifically designed for minimal system integration effort while maximizing cryptographic capability. It's aimed at enhancing existing security infrastructures with post-quantum capabilities, maintaining operational efficiency while providing solid side-channel countermeasures.
The AES Encryption Core is a highly efficient IP core designed for robust security applications. This core is widely recognized for its versatility and has been proven in both FPGA and ASIC environments repeatedly. With nearly 60 licensing instances, it stands as a trusted solution for secure data encryption across multiple platforms. Designed with precision, the AES core is NIST certified and adheres to stringent security protocols, making it suitable for applications that require top-tier data protection. It integrates seamlessly into security frameworks, delivering reliable encryption that withstands extensive evaluation and testing. By leveraging advanced encryption methodologies, this IP core ensures comprehensive data security for various industrial applications. It is adept at managing encrypted data efficiently, making it an ideal choice for sectors demanding fast, reliable encryption without compromising security standards.
The MAC Privacy Protection core by Comcores offers an advanced layer of security for Ethernet systems. It addresses privacy concerns by introducing innovative measures for protecting MAC addresses and other sensitive information during data transmission. With a focus on cybersecurity needs, this core enhances data integrity and ensures confidentiality, allowing systems to operate without the risk of data breaches. It positions itself as an essential component in networks that require stringent privacy controls while maintaining operational efficiency.