All IPs > Security IP
Security IPs are an integral category within the semiconductor industry focusing on the protection of electronic data and hardware. As technological advancements continue to proliferate across critical sectors like finance, healthcare, and automotive, securing data and hardware has never been more paramount. Security IPs are designed to provide essential security features such as encryption, secure communications, and access control to safeguard sensitive information and devices from unauthorized access and cyber threats.
Within the Security IP category, you will find robust offerings that include both hardware and software-based solutions tailored to various security needs. Content Protection Software enables secure data transmission and protects digital content from piracy and unauthorized distribution. Cryptography Cores and Cryptography Software Libraries offer foundational tools for implementing strong encryption algorithms that are crucial for securing communications and data storage.
Embedded Security Modules are integrated within semiconductor devices to facilitate secure data processing and enhance trust in device operations by preventing code tampering and unauthorized hardware modification. Platform Security solutions encompass a broad range of protective measures designed to secure the entire hardware and software ecosystem, ensuring that devices are safe from potential vulnerabilities at every level.
Additionally, Security Protocol Accelerators and Security Subsystems act as dedicated processing units to efficiently handle complex security algorithms and protocols, enhancing the performance of security operations while reducing the burden on primary CPUs. With an unpredictable security landscape, leveraging a range of specialized Security IPs allows designers and engineers to build robust, secure, and reliable semiconductor solutions that can withstand evolving cyber threats.
Overview: Cybersecurity IPs offer a range of essential security features to protect your digital assets and sensitive information. From True Random Number Generators (TRNG) to advanced encryption algorithms like AES, DES, 3DES, and cryptographic hash functions like SHA, as well as RSA for secure key exchange and digital signatures, the IPs provide a comprehensive suite of tools to safeguard your data. Key Features: True Random Number Generator (TRNG): Generates unpredictable and unbiased random numbers for cryptographic applications. Advanced Encryption Standard (AES): Provides robust encryption with symmetric key algorithms for securing data. Data Encryption Standard (DES) and Triple DES (3DES): Implement legacy encryption algorithms for data protection. Hash Functions: Includes secure cryptographic hash functions like SHA (Secure Hash Algorithm) for data integrity verification. RSA: Enables secure key exchange, encryption, and digital signatures for secure communication. These cybersecurity IPs are designed to meet the stringent security requirements of modern applications, ensuring the confidentiality, integrity, and authenticity of your data.
Overview: The Secure Boot IP is a turnkey solution that provides a secure boot facility for an SoC. It implements the Post Quantum secure Leighton-Micali Signature (LMS) as specified in NIST SP800-208. The Secure Boot IP operates as a master or slave peripheral to an Application Processor, serving as a secure enclave that securely stores keys to ensure their integrity and the integrity of the firmware authentication process. Features: Post Quantum Secure LMS Signature: Utilizes a robust Post-Quantum secure algorithm for enhanced security. Firmware Updates: Supports up to 32 thousand firmware updates with a minimal signature size of typically less than 5KBytes. SESIP Level 3 Pre-Certification: Pre-certified to SESIP Level 3 for added security assurance. RTL Delivery: Delivered as RTL for ease of integration into SoC designs. Proprietary IP: Based on proprietary IP with no 3rd party rights or royalties. Operation: The Secure Boot IP operates as a master, managing the boot process of the Application Processor to ensure that it only boots from and executes validated and authenticated firmware. The Secure Boot IP also functions as a slave peripheral, where the Application Processor requests validation of the firmware as part of its boot process, eliminating the need for managing keys and simplifying the boot process. Applications: The Secure Boot IP is versatile and suitable for a wide range of applications, including but not limited to: Wearables Smart/Connected Devices Metrology Entertainment Applications Networking Equipment Consumer Appliances Automotive Industrial Control Systems Security Systems Any SoC application that requires executing authenticated firmware in a simple but secure manner.
Overview: The Secure Enclave IPs are Common Criteria (CC) EAL5+PP0084/PP0117 and EAL5+PP0117 certification-ready Secure Enclaves, respectively. They are available as hard macros for seamless integration into SoCs. These Secure Enclave IPs provide the highest level of security for an SoC, incorporating patented design techniques and countermeasures against side-channel and perturbation attacks to ensure robust security while minimizing power consumption. Key Features: Cryptographic Hardware Accelerators: Efficiently support standard cryptography and security operations to increase throughput while adhering to power constraints and security requirements. BootROM and Secondary Boot Loader: Manage the certified life cycle of the Secure Enclave, enforcing and assuring security from manufacturing to deployment. Proprietary IP: Based on proprietary IP that is free of 3rd party rights and royalties. Benefits: The Secure Enclave IPs offer robust security measures, efficient cryptographic support, and secure life cycle management, making them ideal for applications that require the highest levels of security and reliability. Applications: The Secure Enclave IP is versatile and suitable for a wide range of applications, including but not limited to: Secured and Certified iSIM & iUICC EMVco Payment Hardware Cryptocurrency Wallets FIDO2 Web Authentication V2X HSM Protocols Smart Car Access Secured Boot Secure OTA Firmware Updates Secure Debug Any design requiring a Secure Enclave, Secure Element, or Hardware Root of Trust protected against side-channel and perturbation fault attacks. Compliance and Support: The Secure Enclave is compliant with and ready for CC EAL5+ and EMVCo certification. It is delivered with an SDK and pre-certified CryptoLibrary and secure Boot Loader for seamless integration and enhanced security.
KPIT Technologies is a forerunner in developing AUTOSAR-compliant platforms that support the evolution of software-defined vehicles. Their solutions facilitate efficient software integration, middleware development, and high-level application performance optimization. By using advanced tools and methodologies, KPIT helps speed up the production timelines of modern vehicles, ensuring compliance with both AUTOSAR Classic and Adaptive frameworks. Their technologies enable automakers to minimize platform validation times and reduce integration complexities, thereby enhancing the scalability and functionality of vehicle systems.
KPIT's iDART platform addresses the challenges posed by software-defined vehicles, focusing on optimizing diagnostics, maintenance, and aftersales services. By deploying advanced AI-driven diagnostics and self-learning systems, the platform enhances the reliability of vehicle servicing and improves the overall customer experience. This transformation embraces legacy system integration while advancing toward fully automated, predictive, and customer-centered service models that support the evolving demands of the automotive market.
The Origin E1 is a highly efficient neural processing unit (NPU) designed for always-on applications across home appliances, smartphones, and edge nodes. It is engineered to deliver approximately 1 Tera Operations per Second (TOPS) and is tailored for cost- and area-sensitive deployment. Featuring the LittleNPU architecture, the Origin E1 excels in low-power environments, making it an ideal solution for devices where minimal power consumption and area are critical. This NPU capitalizes on Expedera's innovative packet-based execution strategy, which allows it to perform parallel layer execution for optimal resource use, cutting down on latency, power, and silicon area. The E1 supports a variety of network types commonly used in consumer electronics, including Convolutional Neural Networks (CNNs), Recurrent Neural Networks (RNNs), and more. A significant advantage of Origin E1 is its scalability and market-leading power efficiency, achieving 18 TOPS/W and supporting standard, custom, and proprietary networks. With a robust software stack and support for popular AI frameworks like TensorFlow and ONNX, it ensures seamless integration into a diverse range of AI applications.
PUFrt is a hardware-based root of trust solution that integrates seamlessly into a variety of semiconductor environments. It features a comprehensive security foundation with a 1024-bit Physical Unclonable Function (PUF) and a true random number generator compliant with NIST SP800-90B/SP-800-22 standards. This solution provides a robust platform for key generation and storage, ensuring sensitive data never leaves the chip. With built-in anti-tamper design and an 8k-bit secure storage space, PUFrt is capable of safeguarding vital data against physical attacks. Designed for flexibility, it supports multiple cryptographic operations and integrates easily into various architectures, providing a fortified base for semiconductor security, vital for applications such as secure boot and trusted execution environments.
The RV12 RISC-V Processor is a highly customizable, single-core processor that aligns with the RV32I and RV64I standards. Crafted for the embedded market, this processor is part of Roa Logic's robust family of 32-bit and 64-bit CPUs based on the RISC-V instruction set. The RV12 architecture employs a Harvard structure, enabling concurrent access to instruction and data memory, which boosts performance and efficiency. Designed to meet the demands of modern embedded applications, the RV12 employs a single-issue architecture, optimizing processing effectiveness without the complexity of multi-threading. This processing unit is compatible with a diverse set of applications, offering scalability and versatility while maintaining alignment with industry standard specifications. Additionally, the RV12 comes equipped with a full suite of supportive resources, including testbenches and in-depth documentation. Such features facilitate seamless integration and deployment in various applications, ranging from consumer electronics to more complex industrial uses.
Creonic offers a diverse array of miscellaneous FEC (Forward Error Correction) and DSP (Digital Signal Processing) IP cores, catering to various telecommunications and broadcast standards. This collection of IP cores includes highly specialized solutions like ultrafast BCH decoders and FFT/IFFT processors, which are critical for managing high-throughput data streams and maintaining signal fidelity. These IP cores embody the latest in processing technology, delivering precise error correction and signal transformation functions that are essential in complex communication networks. Their integration capabilities are made easy with detailed hardware specifications and software models, designed for flexibility across different platforms and applications. The rigorous development process guarantees that each core adheres to market standards, optimizing performance and ensuring operational reliability. Creonic's portfolio of miscellaneous FEC and DSP cores stands out for its innovative contributions to digital communications, providing unique solutions that meet the sophisticated requirements of modern connectivity.
PUFcc stands as a state-of-the-art crypto coprocessor, embedding a robust hardware root of trust with a complete suite of cryptographic algorithms essential for securing modern devices. It unites essential elements such as key generation, storage, and a comprehensive crypto engine into one cohesive package. Noteworthy for its adaptability, PUFcc is designed to effortlessly integrate into numerous system architectures, supporting applications across IoT, automotive, and FinTech industries. It provides crucial security features including secure boot, over-the-air updates, and advanced key management capabilities. The suite of NIST CAVP and OSCCA certified algorithms within ensures a high degree of trust and compliance, crucial for maintaining secure communications and data integrity throughout the product lifecycle.
Creonic's Turbo encoders and decoders provide powerful forward error correction techniques applicable in wireless communication systems, including 4G LTE and DVB-RCS2. Known for the efficiency in managing bandwidth and minimizing data loss, these IP cores are designed to boost communication integrity and performance. Leveraging sophisticated iterative algorithms, Turbo encoders and decoders execute precise error detection and correction with high data throughput. They are crafted to integrate seamlessly into various hardware platforms, with detailed hardware models and software reference models available for easy incorporation into any system. This versatility ensures that Creonic's Turbo solutions are suitable for both new and existing infrastructures. Quality assurance remains a cornerstone for these products, with each IP core undergoing extensive validation to meet demanding specifications. By addressing critical needs in modern communication systems, Creonic’s Turbo offerings continue to be a preferred choice for engineers and developers striving for reliability and efficiency.
Secure OTP is an advanced storage solution utilizing anti-fuse one-time programmable (OTP) memory to protect sensitive data in integrated circuits. With enhanced capabilities over standard OTP systems, Secure OTP offers a unique physical macro and digital RTL design that ensures maximum security for stored data, be it in use, transit, or rest. It features a 1024-bit PUF for improved encryption and supports multiple interfaces for seamless integration across a broad range of applications. The solution mitigates security vulnerabilities in modern chip designs, providing robust protection against data theft and unauthorized access to critical information such as encryption keys and boot codes. This technology is aimed at applications requiring secure data storage, including IoT devices and smart electronics.
Secure Protocol Engines are high-performance IP solutions tailored to manage intensive network and security operations. These IP blocks are designed to handle offloading of network processing tasks, enhancing system efficiency and performance. With integration ease and high compatibility across systems, they offer robust security by accelerating cryptographic protocols immensely necessary in today’s fast-paced digital environments.
Tiempo Secure's True Random Number Generator (TRNG) is a cryptographic IP core designed to infuse high levels of security in digital systems. This module is vital for generating unpredictable random numbers used across various cryptographic functions such as key generation, encryption, digital signatures, and more. The TRNG is crafted to adhere to the highest standards of randomness and security as outlined by NIST and AIS31 test suites. It supports crucial protocols in secure communications like IPsec, MACsec, and TLS/SSL while providing raw data access for AIS31 characterization and incorporating comprehensive health tests. With its ability to integrate seamlessly into existing designs, the TRNG stands as a critical element for enhancing system security. Its implementation includes wrappers for standard buses such as APB and AXI, ensuring compatibility and ease of integration into existing SoC architectures. The TRNG is a cornerstone for secure device operation, ensuring that cryptographic operations maintain their integrity and randomness, thereby safeguarding against potential security breaches in the system.
Polar encoders and decoders by Creonic serve as vital components in enhancing data integrity for next-generation communication frameworks such as 5G. These IP cores are designed to deliver superior coding efficiency and robust performance in varied network conditions, supporting high-speed data transmissions while maintaining low latency. The technology stands out for its innovative use of polar codes, noted for their capacity to achieve channel capacities effectively. Creonic's Polar solutions include hardware and software models tailored for straightforward integration into diverse computational environments. They provide excellent adaptability and scalability across multiple hardware systems, making them ideal for cutting-edge digital communication networks. Backing their robust technological framework, Creonic ensures that each product adheres to strict industry standards through comprehensive testing and quality assurance. The result is a set of highly reliable Polar encoders and decoders designed to enhance the performance and efficiency of advanced communication systems.
Tiempo Secure's Post-Quantum Cryptography (PQC) is designed to offer protection against emerging quantum computing threats, ensuring that cryptographic systems remain secure in the future. This cryptographic solution integrates advanced algorithms that are resilient to quantum attacks, providing a robust next-generation security layer. Key components of the PQC offering include quantum-resistant code signatures, key encapsulation mechanisms, and digital signatures, leveraging advanced algorithms such as the Leighton-Micali Hash-Based Signature Scheme, Crystals-Dilithium, and Crystals-Kyber. These mechanisms are engineered to provide future-proof security, aligning with evolving cryptographic requirements. Tailored for adaptability, PQC ensures dependable security through architecture-ready, hardware-accelerated algorithms that fit into various digital systems. This adaptability makes it suitable for applications seeking enhanced protective measures against quantum threats. With PQC, Tiempo Secure offers a forward-looking approach to securing digital assets, ensuring they are safeguarded from the potential risks posed by quantum computing advancements. This makes it an essential component for modern security strategies, providing peace of mind in a fast-evolving technological landscape.
The PSA Compliant Crypto API by Tiempo Secure offers a streamlined interface for implementing cryptographic functions, ensuring robust digital security. It is a comprehensive package that simplifies cryptographic operations while adhering strictly to the Platform Security Architecture (PSA) benchmarks. Engineered for efficiency, the API provides a software library supporting both Physical Unclonable Functions (PUFs) and a True Random Number Generator with Deterministic Random Bit Generator (TRNG+DRBG). Its design ensures minimal on-chip SRAM usage, occupying only a few kilobytes, ideal for space-constrained environments. Platforms integrating this API can achieve the prestigious 'PSA Certified Storage' status, proving compliance with stringent standards. Its extensive logging options, highly optimized SHA-256, and adherence to MISRA C standards make it a robust choice for enhancing system security. This API enables secure storage of arbitrary keys using SRAM PUFs and supports the generation of 256-bit true random seeds, vital for secure operating environments. It simplifies complex security functions, making it an ideal choice for enhancing system protection across various platforms.
Spec-TRACER is a powerful tool for managing the lifecycle of FPGA and ASIC requirements. It provides a unified platform for capturing, managing, and tracing requirements, making complex designs more manageable and traceable throughout their lifecycle. This tool is specifically tailored to comply with stringent industry standards for user and design requirements, aligning with hardware and software deliverables. By facilitating clear requirement management, Spec-TRACER ensures thorough traceability and accountability, reducing risks of design deviations and enhancing communication across development teams. This results in a streamlined workflow where requirements can be easily documented, tracked, and matched with design outputs effectively. Spec-TRACER excels in capturing detailed analyzes and facilitating robust reporting, aligning closely with processes required in domains such as aerospace and defense. Its capacity to support comprehensive requirements management protocols makes it indispensable for projects demanding high levels of compliance and verification rigor, ultimately enhancing the quality and reliability of final products.
The AES Encrypt/Decrypt 128/192/256 offering from Secantec presents a secure, efficient encryption solution catering to a wide array of security-critical applications. This IP provides flexible encryption levels, supporting 128, 192, and 256-bit key lengths. One of its standout features is the parallel processing of key calculation and data encryption, significantly reducing the number of clock cycles needed. Operating on an 8-bit primitive polynomial in the Galois Field, this asynchronous design underscores both power efficiency and low-latency performance. The encryption/decryption process is nimble, capable of completing within a single clock cycle if conditions are optimized. Targeting areas with stringent security needs, this encryption IP finds use in sectors demanding robust data protection mechanisms, including secure communications and sensitive data transmission. The architecture's flexibility and verified RTL ensure adaptability across various implementation environments.
The ULYSS MCU range from Cortus is a powerful suite of automotive microcontrollers designed to address the complex demands of modern automotive applications. These MCUs are anchored by a highly optimized 32/64-bit RISC-V architecture, delivering impressive performance levels from 120MHz to 1.5GHz, making them suitable for a variety of automotive functions such as body control, safety systems, and infotainment. ULYSS MCUs are engineered to accommodate extensive application domains, providing reliability and efficiency within harsh automotive environments. They feature advanced processing capabilities and are designed to integrate seamlessly into various automotive systems, offering developers a versatile platform for building next-generation automotive solutions. The ULYSS MCU family stands out for its scalability and adaptability, enabling manufacturers to design robust automotive electronics tailored to specific needs while ensuring cost-effectiveness. With their support for a wide range of automotive networking and control applications, ULYSS MCUs are pivotal in the development of reliable, state-of-the-art automotive systems.
SphinX provides industry-standard encryption and decryption using high-performance, low-latency AES-XTS technology. Its design features independent, non-blocking encryption and decryption channels, ensuring data security is maintained without impeding processing speed or system throughput. SphinX is tailored for environments where data protection is paramount, delivering robust security capabilities while preserving system efficiency and performance.
The Flash Protection Series extends PUFsecurity's hardware root of trust capabilities to safeguard flash memory and its embedded systems. This set of solutions enables protection for both embedded and external flash by incorporating PUF-based authentication and encryption across various storage types including NAND and NOR flash. It utilizes PUF technology to enhance the memory's security boundary, preventing unauthorized access and ensuring real-time data integrity. With specialized components like PUFef for embedded flash and PUFenc for external, the series allows seamless integration into larger system-on-chip designs while providing enhanced defenses against common security threats faced by flash-based storage.
FortiCrypt offers a comprehensive lineup of AES solutions, explicitly engineered for robust defense against side-channel attacks (SCA) and fault injection attacks (FIA), including variants like SIFA. Highlighting exceptional performance, these solutions employ masking techniques based on finite field arithmetic. These mechanisms ensure encryption and decryption processes are secure, while maintaining impressive speeds without additional latency. Balancing high security, low gate count, and power consumption, FortiCrypt products are available in configurations focusing on performance, power efficiency, or compact design options. With TVLA methodology verification and Common Criteria accreditations, FortiCrypt products are designed to thrive in even the most vulnerable situations. The suite supports ultra-high performance, ultra-low power efficiency, significant gate count reduction, and satisfies diverse industrial needs, making it applicable for both high-end and existing field devices vulnerable due to insufficient original protections. Moreover, FortiCrypt can be utilized with AMBA, AXI, or APB buses, offering a hardware-software solution integrated into diverse circuit architectures, thus ensuring comprehensive compatibility and security across systems.
The Platform-Level Interrupt Controller (PLIC) from Roa Logic is a fully compliant, configurable module designed specifically for RISC-V applications. It provides a versatile solution for managing interrupts in complex systems, offering the necessary infrastructure to handle numerous interrupt sources efficiently. The PLIC is particularly adept at prioritizing and routing interrupts to ensure effective processor management and operational efficiency. This module is fully parameterized, allowing developers to configure it according to the unique needs of their applications. Whether for simple embedded designs or more sophisticated systems, the PLIC offers customizable parameters that provide flexibility in setting interrupt priorities and handlers. By integrating the PLIC into a design, developers can leverage its interrupt management capabilities to streamline operations, enhance system responsiveness, and improve overall performance. This makes it a critical component for anyone looking to build stable and efficient RISC-V based systems.
The SHA-2 Crypto Engine from Tiempo Secure delivers advanced hashing functionality that is pivotal for ensuring data integrity and security in various applications. This IP core stands out for its efficient processing capabilities, supporting hashing functions like SHA-256 and SHA-224. Designed with a 1 cycle per round architecture, the SHA-2 Crypto Engine supports both the import and export of SHA-256 states, catering to even the most complex cryptographic operations. Its ability to handle any message length with bit granularity makes it versatile for wide-ranging applications. Internal padding is seamlessly handled within the IP, and for ease of integration, it comes with wrappers for standard buses such as APB and AXI. This ensures it fits well into a plethora of existing designs, making it a reliable choice for implementing digital signatures and data integrity checks. A unique feature of the SHA-2 Crypto Engine is its readiness to handle pre-padded payloads, optimizing processing without compromising on performance. It empowers developers to boost their system's security robustness while benefiting from an optimized silicon resource-to-performance ratio.
Tiempo Secure's SHA-3 Crypto Engine is an advanced cryptographic module that offers exceptional flexibility and performance for modern security needs. Emphasizing scalability, the engine supports varying numbers of hashing rounds per clock cycle, optimizing the silicon resource usage while ensuring high throughput. One of the key features is the ability to select between fixed-length and extendable-output functions (XOF) for each message, catering to diverse application requirements. This flexibility is easily manageable through simple configuration settings, making it adaptable to specific needs. Internally, the SHA-3 engine manages message padding and allows for efficient import/export of the KECCAK-p state. The architecture is designed for integration simplicity, featuring wrappers compatible with standard bus protocols like APB and AXI, facilitating smooth incorporation into a myriad of systems. In addition to supporting SHA-3 standard functions, it accelerates the Kangaroo Twelve algorithm, offering a comprehensive suite of cryptographic tools for enhanced data security and integrity across various applications.
The THOR Toolbox provides a multifaceted platform for NFC and UHF connectivity, tailored for a wide range of IoT applications. It contains high-precision NFC components optionally combined with UHF for diverse data transfer capabilities, allowing for secure identification processes. This adaptability across multiple protocols makes it a valuable tool for capturing data and providing early-stage design validation for emerging technologies. Incorporating a robust temperature sensor, THOR measures environmental conditions with high accuracy, which is critical in industrial settings. It supports external sensor interfacing through analog and digital connections, providing flexibility in data acquisition. The toolbox also includes encryption features to ensure data integrity and security, making it ideal for applications requiring stringent data management, such as medical devices. Tailored for sectors facing rigorous demands like the industrial and medical markets, THOR's efficient memory storage and configurable data logging offer scalable solutions across safety, logistics, and healthcare monitoring domains. By enabling rapid development and deployment demonstrations, it significantly accelerates project timelines from concept to completion.
The Cramium Personal Hardware Security Module (PHSM) represents Crossbar's commitment to enhancing security at the hardware level, leveraging its highly efficient ReRAM technology. This module serves as a secure enclave within devices, protecting sensitive information from unauthorized access and potential attacks. By employing Crossbar's ReRAM-based PUF (Physical Unclonable Function) cryptographic keys, the PHSM ensures that each device has a unique digital fingerprint, preventing cloning and adding a robust layer of security. The PHSM is designed to address the growing security concerns in modern electronic devices, especially in sectors like automotive, industrial, and medical industries where data integrity is paramount. With its ability to handle extensive security protocols and encryption methods, the PHSM is crucial for safeguarding data in connected devices, providing secure authentication, and ensuring data confidentiality and integrity. Crossbar's technology allows for the seamless integration of the PHSM into existing semiconductor processes, enhancing security without compromising on device performance or energy efficiency. Moreover, the PHSM offers a highly reliable and tamper-resistant solution that can withstand a variety of environmental conditions. Whether it's for securing IoT endpoints, mobile computing platforms, or large-scale data centers, the PHSM is equipped to handle the demands of modern security requirements efficiently and effectively. Its deployment within a device's architecture ensures that sensitive operations remain isolated and protected, providing peace of mind in an increasingly connected world.
FortiPKA-RISC-V serves as a powerful public key accelerator for handling extensive cryptographic computations, which traditional CPUs struggle with. It is crafted to offload heavy computational tasks from the main processor, thereby optimizing performance and resource efficiency. By avoiding cumbersome data transformation processes, FortiPKA-RISC-V underscores its superior operational speed over other solutions, while being optimal in size and energy consumption. Its cryptographic algorithms are implemented in firmware executed via an embedded RISC-V core, with extended support for custom arithmetic operations, making it versatile across applications that demand high-efficiency cryptographic processing. Moreover, it offers hardware configuration options that balance between performance and resource utilization tailored for specific applications. Supporting an array of cryptography standards, such as RSA and elliptic curve algorithms, and equipped with features for robust defense against side-channel and fault injection attacks, FortiPKA-RISC-V is adaptable to diverse cryptographic environments and requirements. Whether integrated into networks, communications, or IoT devices, it delivers outstanding reliability and security across platforms.
LDPC (Low-Density Parity-Check) encoders and decoders from Creonic are designed to enhance data transmission reliability in complex communication systems. These IP cores support various standards, including DVB-S2X, 5G-NR, and IEEE 802.11, offering exceptional error correction capabilities essential for high-speed data transfer. Utilizing advanced algorithms, Creonic's LDPC solutions deliver robust performance while minimizing complexity and power consumption. The LDPC encoders and decoders embody state-of-the-art hardware models and bit-accurate software reference models for seamless integration into existing systems. The hardware models are compatible with FPGA platforms from leading manufacturers, ensuring adaptability across different technological environments. Comprehensive test environments accompany the IP cores, facilitating smooth deployment and validation. Creonic’s commitment to quality is evident in the rigorous testing processes each IP core undergoes, guaranteeing compliance with stringent industry standards. The LDPC solutions are available for download from secured servers, reflecting Creonic's focus on security and accessibility for their global clientele.
The FortiMac IP core is developed to deliver secure HMAC SHA2 implementations, offering substantial protection against side-channel and fault injection attacks. Utilizing the robust Threshold Implementation (TI) paradigm, FortiMac ensures that even the most sophisticated attacks are unable to compromise its security features. This protection robustness has been validated both through analytical methods and real-world physical device testing. FortiMac's standout feature is its unprecedented security, which answers the requirements of today’s rapidly evolving threat landscapes. This IP can be harnessed in both hardware and software configurations, extending its usability to various critical and non-critical applications, unrestricted by conventional design limitations. It's the only solution of its type in the market, setting a high bar for hardware security implementations. FortiMac is integral in securing applications where safeguarding against SCA and FIA is paramount, especially vital in sectors targeting optimal performance and high-security integrity.
Post-Quantum Cryptography IP addresses the emerging challenges presented by quantum computing threats. This IP includes hardware accelerators that are prepared for lattice-based algorithms, ensuring strong defense capabilities against future cyber threats. It is designed for configurable performance, offering tunable power and area efficiency, which is essential for maintaining security standards as quantum computing evolves. This solution is tailored to secure cryptographic operations, ensuring data remains protected amidst advancements in computational technologies.
The ONNC Calibrator is crafted to optimize AI System-on-Chips by employing post-training quantization (PTQ) techniques to maintain high precision, especially in architectures using fixed-point formats like INT8. By leveraging architecture-aware quantization, it ensures chips retain 99.99% accuracy, offering unparalleled precision control across diverse hardware configurations. This calibrator supports configurable bit-width architectures, allowing the balance of precision and performance to be tailored for various applications. Capable of working with different AI frameworks such as ONNX and PyTorch, the calibrator aligns seamlessly with standard PTQ workflows without needing complex retraining. Its internal AI engine autonomously determines optimal scaling factors, making it an indispensable tool in maintaining model accuracy while reducing computational demand.
DolphinWare IPs is a versatile portfolio of intellectual property solutions that enable efficient SoC design. This collection includes various control logic components such as FIFO, arbiter, and arithmetic components like math operators and converters. In addition, the logic components span counters, registers, and multiplexers, providing essential functionalities for diverse industrial applications. The IPs in this lineup are meticulously designed to ensure data integrity, supported by robust verification IPs for AXI4, APB, SD4.0, and more. This comprehensive suite meets the stringent demands of modern electronic designs, facilitating seamless integration into existing design paradigms. Beyond their broad functionality, DolphinWare’s offerings are fundamental to applications requiring specific control logic and data integrity solutions, making them indispensable for enterprises looking to modernize or expand their product offerings while ensuring compliance with industry standards.
eSi-Crypto offers a robust suite of encryption and authentication solutions designed for ASIC and FPGA implementations. Characterized by low resource usage and high throughput, this cryptographic IP includes True Random Number Generators (TRNGs) that are compliant with NIST standards and can be integrated as a hard macro in the target technology. The IP supports several algorithms, such as CRYSTALS Kyber, CRYSTALS Dilithium for post-quantum cryptography, and widely used standards like RSA and AES, facilitating secure communication across diverse applications. It is compatible with AMBA APB/AHB as well as AXI bus interfaces, making it a versatile choice for sophisticated security needs.
The Securyzr iSSP is a holistic security lifecycle management solution that integrates secure services across all phases of a device's existence. It allows for seamless provisioning, firmware updates, security monitoring, and device identity management in a zero-touch manner. This platform facilitates efficient management and extensive security oversight, empowering enterprises to handle security change implementation smoothly.
The Securyzr Key Management System provides robust, secure key management services across embedded systems. It ensures secure boot, efficient key isolation, and anti-tampering measures, enhancing the trustworthiness of critical systems. Its design ensures data integrity and confidentiality, making it a core component for any secure system architecture. This comprehensive IP solution integrates with existing frameworks to support seamless security management.
Aeonic Insight provides advanced on-die telemetry, offering chip designers significant insights into power grids, clock health, and SoC security. It's tailored for use in complex applications like data centers, AI, 5G, aerospace, and automotive where high observability and programmability are essential. The IP's sensors integrate with third-party platforms to enhance silicon lifecycle analytics, delivering actionable data for refined design decision-making.
The Aeonic Integrated Droop Response System is designed to enhance droop and DVFS response for integrated circuits. It includes multi-threshold droop detection and fast adaptation times, ensuring power savings and optimal system performance. This technology provides extensive observability and integrates standard interfaces like APB & JTAG, aiding silicon health management by delivering data-driven insights for lifecycle analytics.
The AES (standard modes) product from Helion offers a robust encryption solution featuring the Advanced Encryption Standard (AES) algorithm, a 128-bit block cipher known for its efficiency and security. With key sizes of 128, 192, and 256 bits, the AES algorithm complies with NIST standards and is recognized globally for securing sensitive information. This product caters to applications necessitating rapid data processing and heightened security, such as in IPsec, wireless communication, and storage encryption. Helion's AES cores are crafted to deliver optimal performance across a vast array of settings, including both ASIC and FPGA implementations. The cores are designed with scalability in mind, accommodating applications from minimal data rates up to multi-gigabit transmission speeds. Thanks to their architecture, these cores maintain high usability, enabling easy adoption and integration into user systems without excessive resource allocation. Helion's AES suite includes numerous versions tailored to meet varying data transmission needs, ensuring adaptability in resource-constrained environments. Users benefit from the choice of low-power, space-efficient, and high-speed solutions, supporting a wide range of encryption requirements. These cores are also compatible with an array of programmable technologies, reaffirming their utility across diverse platforms, from commercial applications to government-level data protection setups.
The Dynamic Neural Accelerator II (DNA-II) by EdgeCortix represents a new leap in neural network processing. This IP core is exceptionally efficient and provides scalable performance by reconfiguring runtime interconnects between its computing units. Supporting both convolutional and transformer models, DNA-II is tailored for edge AI tasks that demand high parallel processing. The modular DNA-II stands out by enhancing parallelism and optimizing on-chip memory bandwidth usage. Its symbiotic relationship with software solutions like the MERA compiler boosts its efficacy in deploying neural networks across varied applications, from smart cities to automotive systems.
PQPerform Lattice is developed for applications demanding high-speed cryptographic performance, providing an all-in-one solution engineered for high-throughput requirements. It seamlessly fits into network hardware and HSMs (Hardware Security Modules) settings that necessitate rapid digital signature and key exchange processing. This post-quantum processor is optimized for maximum compatibility with Linux systems.
With PQPlatform Lattice, PQShield extends lattice-based cryptography capabilities for hardware implementations requiring post-quantum security. This engine provides minimal-area solutions with side-channel protection, suitable for embedded devices. Integrated with SHA-3, this platform is aligned with NIST standards and is optimal for systems demanding small area deployment with robust security.
The AES Encryption for RFID applications is engineered to provide robust security for data in RFID communications. Utilizing Advanced Encryption Standard (AES) techniques, it offers a secure and efficient mechanism for protecting sensitive information transmitted in RFID systems. This encryption solution is ideal for applications where data integrity and confidentiality are paramount, protecting against unauthorized access and ensuring secure wireless transactions.
The Alcora V-by-One® HS Daughter Card is engineered to connect seamlessly with any FPGA development board equipped with high-speed transceivers, supporting advanced video applications with ease. This card supports amalgamation of two FMC cards, resulting in up to 16 lanes that can handle video resolutions as high as 4K at 120Hz or 8K at 30Hz. Versatile by nature, the Alcora card comes in two configurations: with either 51-pin or 41-pin headers, expanding its adaptability to various devices. It features two clock generators aimed at minimizing jitter in the recovered RX clock, thus ensuring reliable video transmission under high-speed operation conditions. V-by-One® HS, developed by THine Electronics, Inc., is a high-speed digital interface technology primed for the flat-panel display market. Its design easily supports the growing need for higher resolution and frame rate in modern displays, making it an ideal choice for high-definition video transmission projects. The Alcora daughter card enhances design flexibility and capability in developing next-generation video applications.
The 100 Gbps Polar Encoder and Decoder from IPrium is a high-speed solution designed to meet the needs of ultra-fast data transmission networks. Polar coding, known for its capacity-achieving attributes, ensures that data can be transmitted reliably even near the channel capacity limit. This encoder and decoder pair excels in providing comprehensive error correction capabilities while accommodating substantial data rates, essential for cutting-edge telecommunication networks and data centers. By implementing sophisticated polar codes, these cores manage to minimize error rates, enhancing overall communication fidelity. With applications spanning from 5G networks to data-intensive server environments, the 100 Gbps Polar Encoder and Decoder is a versatile tool for future-proofing network infrastructure. By utilizing this technology, IPrium combines high throughput with reliable error correction, catering to the evolving demands of modern digital communication frameworks.
The OmniTRUST™ PVT Monitor IP is a robust solution designed to manage and monitor process, voltage, and temperature variations in semiconductor devices. This IP is essential for improving the reliability and efficiency of electronic systems by offering precise and real-time feedback on operational parameters. It acts as a critical enabler for dynamic thermal management and voltage regulation, ensuring that electronic systems operate under optimal conditions. Capable of monitoring over a wide temperature range, the OmniTRUST™ PVT Monitor IP provides high accuracy in temperature readings and versatile voltage monitoring capabilities. Its design facilitates low standby power modes, enhancing the overall energy efficiency of the IP. This makes it indispensable for applications where device reliability and consistent performance are key concerns, such as in automotive electronics and portable devices. The PVT Monitor is customizable and can be adapted for use across various process nodes. It seamlessly fits into Omni Design’s broader portfolio of power management and monitoring solutions, supporting functions critical for modern electronic systems, such as predictive maintenance and adaptive performance adjustments.
SASCrypt: Cryptographic for Substation Automation Systems provides advanced security solutions tailored for the critical infrastructure of substation automation. This product ensures that data integrity, confidentiality, and authenticity are maintained across vital communications within power systems. Utilizing robust cryptographic techniques, SASCrypt protects against unauthorized data access and tampering, vital in substation environments where security breaches can lead to significant operational disruptions. It integrates seamlessly with existing systems, ensuring a streamlined enhancement to security protocols without necessitating major infrastructural overhauls. This cryptographic solution is a critical component in maintaining the secure operation of automated substations, providing peace of mind with its rigorous adherence to security standards. Its deployment ensures that sensitive data transmitted across networks remains uncompromised, safeguarding power transmission and distribution operations.
The TakeCharge Electrostatic Discharge Solutions are specialized innovations designed to offer unparalleled protection against electrostatic discharge in advanced semiconductor processes. These solutions are compatible with the latest FinFET technology, including TSMC's 3nm node, which presents unique challenges such as narrow design windows that traditional ESD methods like ggNMOS cannot address effectively. Sofics's TakeCharge solutions provide a reliable and robust alternative, ensuring the safety and functionality of high-speed devices. The narrow margins in modern FinFET processes necessitate precision and adaptability, which is where TakeCharge shines. It is capable of safeguarding delicate electronics used across various applications, ranging from AI to data centers and beyond. The solutions in this portfolio leverage low parasitic capacitance and high voltage tolerance, maintaining performance without compromising on efficiency or footprint. In addition to their technological prowess, these solutions have been silicon-proven across multiple foundries, demonstrating their adaptability and success in real-world scenarios. TakeCharge assures interfacing reliability and protection for state-of-the-art integrated circuits, making it indispensable for modern electronic design.
MACSec IP by CoMira Solutions is designed to safeguard network communications by implementing Media Access Control Security as defined by IEEE standards. By using a unique time-division multiplexed cut-through architecture, the MACSec IP ensures secure and efficient data transfer within local area networks. It supports a wide range of configurations including custom security associations and supports multiple ports for simultaneous data protection, thereby making it adaptable to diverse network topologies and security requirements.