All IPs > Processor > Microcontroller
Microcontrollers form the backbone of many modern electronic devices, offering precise control and processing capabilities that power everything from consumer electronics to industrial machines. In the world of semiconductor IPs, microcontrollers provide the essential building blocks that allow developers to design complex functionalities tailored to specific applications. This category is vital for those looking to integrate processing and control functionalities directly into their embedded systems, providing efficiencies in both performance and energy use.
Microcontrollers available as semiconductor IPs are used in a broad spectrum of applications, from automotive and aerospace to smart home devices and IoT gadgets. By selecting a microcontroller IP, developers can customize core functions such as CPU architecture, memory management, input/output controls, and specialized peripherals to meet the specific needs of their projects. These IPs are designed to streamline the development process, reduce time-to-market, and offer flexibility in the design and scalability of end products.
One of the key advantages of utilizing microcontroller semiconductor IPs is the ability to incorporate proprietary or emerging technologies seamlessly into existing systems. This not only helps in keeping the product line up-to-date with the latest technology trends but also ensures that the devices remain competitive in the rapidly evolving electronics marketplace. Moreover, integrating microcontroller IPs can lead to cost savings by minimizing the need for additional chips and lowering power consumption through optimized architectures and process technologies.
As you explore the Processor > Microcontroller category in our Silicon Hub, you'll discover a wealth of options that cater to various industry needs, ranging from low-power designs suitable for portable devices to high-performance solutions required for complex computing tasks. Whether you are designing a simple control unit or a sophisticated embedded application, microcontroller semiconductor IPs provide the versatility and functionality necessary to drive innovation.
The NMP-750 is a high-performance accelerator designed for edge computing, particularly suited for automotive, AR/VR, and telecommunications sectors. It boasts an impressive capacity of up to 16 TOPS and 16 MB local memory, powered by a RISC-V or Arm Cortex-R/A 32-bit CPU. The three AXI4 interfaces ensure seamless data transfer and processing. This advanced accelerator supports multifaceted applications such as mobility control, building automation, and multi-camera processing. It's designed to cope with the rigorous demands of modern digital and autonomous systems, offering substantial processing power and efficiency for intensive computational tasks. The NMP-750's ability to integrate into smart systems and manage spectral efficiency makes it crucial for communications and smart infrastructure management. It helps streamline operations, maintain effective energy management, and facilitate sophisticated AI-driven automation, ensuring that even the most complex data flows are handled efficiently.
Designed for high-demand applications in server and computing environments, the SCR9 Processor Core stands as a robust 64-bit RISC-V solution. It features a 12-stage superscalar, out-of-order pipeline to handle intensive processing tasks, further empowered by its versatile floating-point and vector processing units. The core is prepared to meet extensive computing needs with support for up to 16-core clustering and seamless AOSP or Linux operating systems integration.\n\nInvesting in powerful memory subsystems including L1, L2, and shared L3 caches enhances data handling, while features like memory coherency ensure fluid operation in multi-core settings. Extensions in cryptography and vector operations further diversify its application potential, establishing the SCR9 as an ideal candidate for cutting-edge data tasks.\n\nFrom enterprise servers to personal computing devices, video processing, and high-performance computations for AI and machine learning, the SCR9 delivers across an array of demanding scenarios. Its design integrates advanced power and process technologies to cater to complex computing landscapes, embodying efficiency and innovation in processor core technology.
The NMP-350 is a cutting-edge endpoint accelerator designed to optimize power usage and reduce costs. It is ideal for markets like automotive, AIoT/sensors, and smart appliances. Its applications span from driver authentication and predictive maintenance to health monitoring. With a capacity of up to 1 TOPS and 1 MB of local memory, it incorporates a RISC-V/Arm Cortex-M 32-bit CPU and supports three AXI4 interfaces. This makes the NMP-350 a versatile component for various industrial applications, ensuring efficient performance and integration. Developed as a low-power solution, the NMP-350 is pivotal for applications requiring efficient processing power without inflating energy consumption. It is crucial for mobile and battery-operated devices where every watt conserved adds to the operational longevity of the product. This product aligns with modern demands for eco-friendly and cost-effective technologies, supporting enhanced performance in compact electronic devices. Technical specifications further define its role in the industry, exemplifying how it brings robust and scalable solutions to its users. Its adaptability across different applications, coupled with its cost-efficiency, makes it an indispensable tool for developers working on next-gen AI solutions. The NMP-350 is instrumental for developers looking to seamlessly incorporate AI capabilities into their designs without compromising on economy or efficiency.
The A25 processor model is a versatile CPU suitable for a variety of embedded applications. With its 5-stage pipeline and 32/64-bit architecture, it delivers high performance even with a low gate count, which translates to efficiency in power-sensitive environments. The A25 is equipped with Andes Custom Extensions that enable tailored instruction sets for specific application accelerations. Supporting robust high-frequency operations, this model shines in its ability to manage data prefetching and cache coherence in multicore setups, making it adept at handling complex processing tasks within constrained spaces.
RaiderChip's GenAI v1 is a pioneering hardware-based generative AI accelerator, designed to perform local inference at the Edge. This technology integrates optimally with on-premises servers and embedded devices, offering substantial benefits in privacy, performance, and energy efficiency over traditional hybrid AI solutions. The design of the GenAI v1 NPU streamlines the process of executing large language models by embedding them directly onto the hardware, eliminating the need for external components like CPUs or internet connections. With its ability to support complex models such as the Llama 3.2 with 4-bit quantization on LPDDR4 memory, the GenAI v1 achieves unprecedented efficiency in AI token processing, coupled with energy savings and reduced latency. What sets GenAI v1 apart is its scalability and cost-effectiveness, significantly outperforming competitive solutions such as Intel Gaudi 2, Nvidia's cloud GPUs, and Google's cloud TPUs in terms of memory efficiency. This solution maximizes the number of tokens generated per unit of memory bandwidth, thus addressing one of the primary limitations in generative AI workflow. Furthermore, the adept memory usage of GenAI v1 reduces the dependency on costly memory types like HBM, opening the door to more affordable alternatives without diminishing processing capabilities. With a target-agnostic approach, RaiderChip ensures the GenAI v1 can be adapted to various FPGAs and ASICs, offering configuration flexibility that allows users to balance performance with hardware costs. Its compatibility with a wide range of transformers-based models, including proprietary modifications, ensures GenAI v1's robust placement across sectors requiring high-speed processing, like finance, medical diagnostics, and autonomous systems. RaiderChip's innovation with GenAI v1 focuses on supporting both vanilla and quantized AI models, ensuring high computation speeds necessary for real-time applications without compromising accuracy. This capability underpins their strategic vision of enabling versatile and sustainable AI solutions across industries. By prioritizing integration ease and operational independence, RaiderChip provides a tangible edge in applying generative AI effectively and widely.
The eSi-3250 is a robust 32-bit processor core from eSi-RISC, specifically engineered to handle high-performance computing with extensive caching capabilities. It is particularly efficient when dealing with slower memory systems such as eFlash or off-chip alternatives, optimizing system throughput by leveraging its configurable instruction and data caches. This core supports a comprehensive instruction set, including optional application-specific instructions and standard floating-point operations compliant with IEEE standards. Its architecture makes use of 16 and 32-bit instructions to maximize code density, ensuring efficient use of cache and system resources. Designed with high clock speed potential, the eSi-3250 integrates a multi-mode MMU, allowing for complex memory management strategies. This core is exceptionally suitable for scenarios demanding high computational power within FPGA or ASIC implementations. It provides flexible integration options through its AMBA-compliant bus interfaces, supporting a vast range of ancillary IP modules to tailor performance to specific application needs.
Designed for embedded control applications, the eSi-3200 is a high-performing 32-bit processor core. It offers a balance of low-cost implementation and significant processing capability, making it a fitting choice for environments necessitating efficient on-chip memory usage. The eSi-3200 leverages a cacheless architecture that ensures deterministic computation, ideal for real-time systems. Its comprehensive instruction set includes advanced arithmetic operations and optional IEEE 754 compliant single-precision floating-point instructions. This architecture enhances code density and minimizes power consumption via a mix of 16 and 32-bit instructions. With a 5-stage pipeline, this core can achieve high clock speeds, enhancing its utility in demanding applications. It accommodates both user and supervisor modes for secure operation and supports extensive hardware debugging features to streamline development and troubleshooting processes. The eSi-3200 also facilitates integration through AMBA bus compatibility, enabling connectivity with a wide variety of peripheral IPs.
The eSi-1600 is a compact 16-bit RISC processor core engineered for efficiency and low power. It is well-suited for control applications that typically utilize 8-bit systems, boasting reduced system costs akin to those smaller CPUs, yet providing significantly higher performance. Its architecture allows for reduced clock cycles per application, resulting in substantial power savings, which is particularly beneficial in resource-constrained environments. This processor core features a 5-stage pipeline that enhances its ability to achieve higher clock frequencies, even in matured semiconductor processes. It includes a rich set of arithmetic instructions, offering capabilities like full 32-bit multiplication and accumulations, bit manipulation, and optional application-specific instructions. This versatility is further illustrated by the optional support for user and supervisor operating modes, reflecting its adaptability across multiple application scenarios. Besides typical features such as JTAG or serial debug capabilities, the eSi-1600 supports a wide array of peripherals through standard AMBA interconnects. Its instruction set achieves exceptional code density by utilizing intermixed 16 and 32-bit instructions. The processor's silicon-proven design, combined with extensive toolchain support, makes it a highly reliable choice for low-cost embedded applications.
The NMP-550 is tailored for enhanced performance efficiency, serving sectors like automotive, mobile, AR/VR, drones, and robotics. It supports applications such as driver monitoring, image/video analytics, and security surveillance. With a capacity of up to 6 TOPS and 6 MB local memory, this accelerator leverages either a RISC-V or Arm Cortex-M/A 32-bit CPU. Its three AXI4 interface support ensures robust interconnections and data flow. This performance boost makes the NMP-550 exceptionally suited for devices requiring high-frequency AI computations. Typical use cases include industrial surveillance and smart robotics, where precise and fast data analysis is critical. The NMP-550 offers a blend of high computational power and energy efficiency, facilitating complex AI tasks like video super-resolution and fleet management. Its architecture supports modern digital ecosystems, paving the way for new digital experiences through reliable and efficient data processing capabilities. By addressing the needs of modern AI workloads, the NMP-550 stands as a significant upgrade for those needing robust processing power in compact form factors.
KPIT's Vehicle Engineering & Design Solutions empower manufacturers to leverage cutting-edge design and simulation technologies for efficient vehicle development. Focusing on sustainability and cost-efficient production, these solutions include advanced CAD methodologies and digital twins that streamline design processes. KPIT provides a comprehensive suite of engineering services that help OEMs develop appealing and compliant vehicles, facilitating faster time-to-market and innovation across model ranges.
The NaviSoC is a cutting-edge system-on-chip (SoC) that integrates a GNSS receiver and an application processor on one silicon die. Known for its high precision and reliability, it provides users with a compact and energy-efficient solution for various applications. Capable of supporting all GNSS bands and constellations, it offers fast time-to-first-fix, centimeter-level accuracy, and maintains high sensitivity even in challenging environments. The NaviSoC's flexible design allows it to be customized to meet specific user requirements, making it suitable for a wide range of applications, from location-based services to asset tracking and smart agriculture. The incorporation of a RISC-V application microcontroller, along with an array of peripherals and interfaces, introduces expanded functionality, optimizing it for advanced IoT and industrial applications. Engineered for power efficiency, the NaviSoC supports a range of supply voltages, ensuring low power consumption across its operations. The chip's design provides for efficient integration into existing systems with the support of a comprehensive SDK and IDE, allowing developers to tailor solutions to their precise needs in embedded systems and navigation infrastructures.
Standing at the pinnacle of eSi-RISC's processor cores, the eSi-3264 offers a powerful 32/64-bit architecture with DSP extensions designed for intensive computing tasks. Its unique ability to process both SIMD fixed and floating-point operations makes it ideal for advanced applications requiring complex digital signal processing with minimal hardware footprint. The eSi-3264 excels in applications needing DSP capabilities due to its fully pipelined MAC unit and the support for dual and quad 64-bit accumulations. The architecture supports a wide range of application-specific instructions and enhanced memory management via configurable caches and an optional MMU. Leveraging industry-standard interfaces, it allows seamless integration with existing chip architectures. These capabilities, coupled with high code density and efficient power management strategies, reinforce its suitability for next-generation multimedia, signal processing, and control systems looking to maximize performance and minimize power consumption.
xcore.ai is a versatile platform specifically crafted for the intelligent IoT market. It hosts a unique architecture with multi-threading and multi-core capabilities, ensuring low latency and high deterministic performance in embedded AI applications. Each xcore.ai chip contains 16 logical cores organized in two multi-threaded processor 'tiles' equipped with 512kB of SRAM and a vector unit for enhanced computation, enabling both integer and floating-point operations. The design accommodates extensive communication infrastructure within and across xcore.ai systems, providing scalability for complex deployments. Integrated with embedded PHYs for MIPI, USB, and LPDDR, xcore.ai is capable of handling a diverse range of application-specific interfaces. Leveraging its flexibility in software-defined I/O, xcore.ai offers robust support for AI, DSP, and control processing tasks, making it an ideal choice for enhancing IoT device functionalities. With its support for FreeRTOS, C/C++ development environment, and capability for deterministic processing, xcore.ai guarantees precision in performance. This allows developers to partition xcore.ai threads optimally for handling I/O, control, DSP, and AI/ML tasks, aligning perfectly with the specific demands of various applications. Additionally, the platform's power optimization through scalable tile clock frequency adjustment ensures cost-effective and energy-efficient IoT solutions.
The Y180 is a streamlined microprocessor design, incorporating approximately 8K gates and serving primarily as a CPU clone of the Zilog Z180. It caters to applications requiring efficient, compact processing power without extensive resource demands. Its design is particularly apt for systems that benefit from Z80 architecture compatibility, ensuring effortless integration and functionality within a variety of technological landscapes.
The Yitian 710 Processor stands as a flagship ARM-based server processor spearheaded by T-Head, featuring an intricate architecture designed by the company itself. Utilizing advanced multi-core technology, the processor incorporates up to 128 high-performance ARMv9 CPU cores, each complete with its own substantial cache for enhanced data access speed. The processor is adeptly configured to handle intensive computing tasks, supported by a robust off-chip memory system with 8-channel DDR5, reaching peak bandwidths up to 281GB/s. An impressive I/O subsystem featuring PCIe 5.0 interfaces facilitates extensive data throughput capabilities, making it highly suitable for high-demand applications. Compliant with modern energy efficiency standards, the processor boasts innovative multi-die packaging to maintain optimal heat dissipation, ensuring uninterrupted performance in data centers. This processor excels in cloud services, big data computations, video processing, and AI inference operations, offering the speed and efficiency required for next-generation technological challenges.
The AndeShape Platforms are designed to streamline system development by providing a diverse suite of IP solutions for SoC architecture. These platforms encompass a variety of product categories, including the AE210P for microcontroller applications, AE300 and AE350 AXI fabric packages for scalable SoCs, and AE250 AHB platform IP. These solutions facilitate efficient system integration with Andes processors. Furthermore, AndeShape offers a sophisticated range of development platforms and debugging tools, such as ADP-XC7K160/410, which reinforce the system design and verification processes, providing a comprehensive environment for the innovative realization of IoT and other embedded applications.
The SCR7 Application Core is an epitome of advanced data processing capability within the RISC-V framework, designed to handle the computational requirements of sophisticated applications. This Linux-capable 64-bit core incorporates a dual-issue, out-of-order 12-stage pipeline featuring vector and cryptography extensions, optimizing operations for heavy data-centric workloads.\n\nIts memory subsystem includes robust L1, L2, and MMU configurations that equip the SCR7 with the prerequisite tools for expansive architectural frameworks. Support for dual-core multiprocessor configurations and efficient cache coherency ensures streamlined operations, catering to diverse processing needs across networked and AI applications.\n\nApplications in high-performance computing, AI, and networking thrive with the SCR7 core's energy-efficient, data-allied design. From video processing to computer vision, this core empowers developers to transcend traditional limitations, ushering in a new era of computational capability for enterprise and consumer technologies alike.
The Avispado is a sleek and efficient 64-bit RISC-V in-order processing core tailored for applications where energy efficiency is key. It supports a 2-wide in-order issue, emphasizing minimal area and power consumption, which makes it ideal for energy-conscious system-on-chip designs. The core is equipped with direct support for unaligned memory accesses and is multiprocessor-ready, providing a versatile solution for modern AI needs. With its small footprint, Avispado is perfect for machine learning systems requiring little energy per operation. This core is fully compatible with RISC-V Vector Specification 1.0, interfacing seamlessly with Semidynamics' vector units to support vector instructions that enhance computational efficiency. The integration with Gazzillion Misses™ technology allows support for extensive memory latency workloads, ideal for key applications in data center machine learning and recommendation systems. The Avispado also features a robust set of RISC-V instruction set extensions for added capability and operates smoothly within Linux environments due to comprehensive memory management unit support. Multiprocessor-ready design ensures flexibility in embedding many Avispado cores into high-bandwidth systems, facilitating powerful and efficient processing architectures.
The eSi-1650 is an advanced 16-bit RISC processor core that incorporates an instruction cache for enhanced performance. Targeted at low-power applications traditionally serviced by 8-bit processors, the inclusion of caching makes the eSi-1650 especially effective when using non-volatile memories like Flash. The processor's power efficiency is emphasized through a low gate count and caches, which optimize the speed and power consumption when interfacing with slow memory technologies. This RISC core also supports a rich suite of instructions including full 32-bit mathematical operations and various user-defined instructions, providing crisp, responsive performance for embedded systems. Additional features include a configurable pipeline, vector interrupts, and compatibility with various AMBA buses, making integration with existing systems straightforward. The processor supports both dedicated user and supervisor operating modes, reflecting its flexibility and security considerations in professional applications.
The SCR1 Microcontroller Core is a 32-bit, open-source design that caters to entry-level and deeply embedded applications. This RISC-V-compatible core is crafted for general-purpose and control systems and features a 4-stage in-order pipeline with optional extensions for reduced base integer and integer multiplication and division. Robust interrupt handling and compatibility with industry-standard interfaces like AXI4, AHB-Lite, and JTAG make the SCR1 versatile for real-time applications. Its open-source stature under a permissive license offers both academic and commercial deployment opportunities right out of the box.\n\nAccompanying the SCR1 core is a comprehensive software package that includes pre-configured development tools to expedite deployment. Ready-made interactive development environments, such as Eclipse and Visual Studio Code, alongside standardized compilers, enable developers to harness the core's capabilities efficiently. A variety of simulators and debuggers streamline integration and testing processes, ensuring this core is not just powerful, but developer-friendly too.\n\nApplications for the SCR1 span across IoT, smart home solutions, as well as education programs, where its cost-effective, low-power design is highly advantageous. With capabilities suitable for smart cards, sensors, and various control systems, the SCR1 Microcontroller Core is a pivotal component in embedded systems, offering unparalleled flexibility and efficiency.
The GenAI v1-Q from RaiderChip brings forth a specialized focus on quantized AI operations, reducing memory requirements significantly while maintaining impressive precision and speed. This innovative accelerator is engineered to execute large language models in real-time, utilizing advanced quantization techniques such as Q4_K and Q5_K, thereby enhancing AI inference efficiency especially in memory-constrained environments. By offering a 276% boost in processing speed alongside a 75% reduction in memory footprint, GenAI v1-Q empowers developers to integrate advanced AI capabilities into smaller, less powerful devices without sacrificing operational quality. This makes it particularly advantageous for applications demanding swift response times and low latency, including real-time translation, autonomous navigation, and responsive customer interactions. The GenAI v1-Q diverges from conventional AI solutions by functioning independently, free from external network or cloud auxiliaries. Its design harmonizes superior computational performance with scalability, allowing seamless adaptation across variegated hardware platforms including FPGAs and ASIC implementations. This flexibility is crucial for tailoring performance parameters like model scale, inference velocity, and power consumption to meet exacting user specifications effectively. RaiderChip's GenAI v1-Q addresses crucial AI industry needs with its ability to manage multiple transformer-based models and confidential data securely on-premises. This opens doors for its application in sensitive areas such as defense, healthcare, and financial services, where confidentiality and rapid processing are paramount. With GenAI v1-Q, RaiderChip underscores its commitment to advancing AI solutions that are both environmentally sustainable and economically viable.
The SCR6 Microcontroller Core is infused with high-performance attributes, optimizing operations for embedded RTOS applications requiring significant computational vigor. This silicon-proven, 64-bit RISC-V processor utilizes a 12-stage superscalar pipeline with out-of-order processing, enabling efficient execution of complex tasks. Complementing its high-precision floating-point unit are innovative cryptographic and bit manipulation extensions, broadening its functional scope across various domains.\n\nThis core supports multicore configurations accommodating up to 8 processors, alongside caches and a PMP unit that validate RTOS functionality. Standard interfaces like AXI4 and JTAG enrich its adaptability for embedded integrations, ensuring compatibility with evolving technology landscapes.\n\nDevelopers in industrial automation, motor control, image processing, and automotive systems benefit from the SCR6’s substantial computational capabilities. Its holistic design caters to advanced smart home and sensor fusion systems, delivering robust power and performance in an efficient, scalable format.
The SiFive Essential family of processors caters to a wide range of applications with its highly customizable IP cores. Designed to meet specific market needs, these processors range from small, power-efficient designs for microcontrollers to fully-featured, Linux-capable superscalar processors. Featuring configurable microarchitectures, the Essential family provides scalability in performance and power, making it an ideal choice for diverse applications from IoT to real-time control. The Essential series is highly adaptable, with series like the 2-Series offering power and area optimization through a 2-4 stage pipeline for embedded solutions. In contrast, the 6-Series and 7-Series provide extensive configurability with their 8-stage pipelines suited for more demanding applications requiring 32/64-bit capable systems. Emphasizing flexibility, the Essential family enables a mix-and-match capability, allowing designers to combine deterministic real-time processors with higher performance application cores. With built-in Trace + Debug capabilities and open-soc security features, the Essential processors provide an integrated solution for efficient and secure processing.
Azurite Core-hub is an innovative processor solution that excels in performance, catering to challenging computational tasks with efficiency and speed. Designed with the evolving needs of industries in mind, Azurite leverages cutting-edge RISC-V architecture to deliver high performance while maintaining scalability and flexibility in design. This processor core stands out for its ability to streamline tasks and simplify the complexities often associated with processor integration. The Azurite Core-hub's architecture is tailored to enhance computation-intensive applications, ensuring rapid execution and robust performance. Its open-source RISC-V base supports easy integration and freedom from vendor lock-in, providing users the liberty to customize their processors according to specific project needs. This adaptability makes Azurite an ideal choice for sectors like AI/ML where high performance is crucial. InCore Semiconductors has fine-tuned the Azurite Core-hub to serve as a powerhouse in the processor core market, ensuring that it meets rigorous performance benchmarks. It offers a seamless blend of high efficiency and user-friendly configurability, making it a versatile asset for any design environment.
The M8051EW expands upon the M8051W's impressive performance by incorporating on-chip debugging capabilities. This microcontroller core offers not only rapid execution but also integrates a JTAG debug port for compatibility with external debugging tools. Additionally, this core is designed with hardware breakpoints and instruction tracebacks, providing full read and write access across all register and memory locations. Such capabilities, together with its fast execution cycle, make it an ideal choice for designs requiring advanced debugging and real-time control.
The Chipchain C100 is a sophisticated, single-chip solution designed for Internet of Things (IoT) applications. It is built around a 32-bit RISC-V CPU operating at speeds of up to 1.5GHz, supplemented by embedded RAM and ROM, ensuring exceptional computational efficiency. The C100 integrates several essential features for IoT use, including Wi-Fi capability, multiple data transmission interfaces, and built-in ADCs, LDOs, and temperature sensors. This integration is aimed at simplifying and expediting application development across various domains ranging from security to healthcare.
The SCR4 Microcontroller Core stands out with its ability to perform floating-point arithmetic, ideal for high-performance, low-power applications. This 32/64-bit RISC-V core integrates a floating-point unit alongside a 5-stage in-order pipeline, supporting atomic operations and optional single and double precision floating-point instructions. Such capabilities make it suitable for applications requiring enhanced mathematical computations, such as sensor hubs and mobile devices.\n\nEquipped with L1 and L2 caches, an MPU unit, and multicore processing capabilities, the SCR4 offers significant improvements in processing efficiency, facilitating real-time execution of various operating systems. Its compatibility with standard interfaces, coupled with sophisticated branch prediction and error-protection features, underscores its versatility across multiple embedded applications.\n\nIndustries such as industrial automation, the IoT, automotive, and smart sensors are prime benefactors of the SCR4's optimized capabilities. Its superior design supports smart home devices and mobile technologies, blending performance and power management into a compact, area-efficient package.
The Spiking Neural Processor T1 is an innovative ultra-low power microcontroller designed for always-on sensing applications, bringing intelligence directly to the sensor edge. This processor utilizes the processing power of spiking neural networks, combined with a nimble RISC-V processor core, to form a singular chip solution. Its design supports next-generation AI and signal processing capabilities, all while operating within a very narrow power envelope, crucial for battery-powered and latency-sensitive devices. This microcontroller's architecture supports advanced on-chip signal processing capabilities that include both Spiking Neural Networks (SNNs) and Deep Neural Networks (DNNs). These processing capabilities enable rapid pattern recognition and data processing similar to how the human brain functions. Notably, it operates efficiently under sub-milliwatt power consumption and offers fast response times, making it an ideal choice for devices such as wearables and other portable electronics that require continuous operation without significant energy draw. The T1 is also equipped with diverse interface options, such as QSPI, I2C, UART, JTAG, GPIO, and a front-end ADC, contained within a compact 2.16mm x 3mm, 35-pin WLCSP package. The device boosts applications by enabling them to execute with incredible efficiency and minimal power, allowing for direct connection and interaction with multiple sensor types, including audio and image sensors, radar, and inertial units for comprehensive data analysis and interaction.
The Rabbit 4000 microprocessor represents a significant escalation in processing capabilities, boasting an impressive 161K gate design and 128-pin configuration. Developed to cater to demanding digital environments, this processor delivers advanced performance alongside flexible deployment options. It is particularly tailored for use in complex systems requiring both potent processing power and diverse interface options, while still adhering to industry standards for adaptability and integration.
The SCR3 Microcontroller Core is an efficient RISC-V processor tailored for embedded applications that demand high performance in power-sensitive environments. This 32/64-bit microcontroller-class core features a sophisticated 5-stage in-order pipeline with support for atomic instructions, compressed extensions, and integer multiplication and division. The design is enriched with a dynamic branch predictor and supports up to 4-core symmetric multiprocessing for improved performance and memory coherency.\n\nThe SCR3's memory architecture includes tightly coupled memory (TCM) with error correction features, L1/L2 caches, and a configurable memory protection unit that supports various privilege modes. A robust interrupt system is facilitated by industry-standard interfaces such as AHB, AXI4, and JTAG, making it a powerhouse for real-time operating systems and heterogeneous cluster integration.\n\nApplications of the SCR3 core expand into industrial automation, IoT, smart meters, and storage devices. The processor's optimization for energy efficiency, small area, and high performance addresses the unique requirements of these fields, ensuring smooth operation of automation systems, smart home applications, and automotive systems.
The SCR5 Application Core represents Syntacore’s entry-level Linux-capable processor, probing the depths of efficient data processing with its RISC-V 32/64-bit infrastructure. The design constitutes a 9-stage in-order pipeline boasting rigorous support for integer and floating-point processing, alongside comprehensive Linux capabilities.\n\nDesigned with an FPU for enhanced arithmetic calculations and multicore clusters supporting up to 4 processors, the SCR5 grants developers the apparatus required for real-time and complex operating system executions. The integration of an MMU, high-capacity caches, and error-protection ensures maintainable execution of critical applications, fostering innovative development in embedded computing.\n\nThe SCR5’s advantageous features come to fruition in fields such as industrial automation, IoT, and wearable devices, crafting solutions to support a spectrum of smart home and automotive systems. The core provides an amalgamation of power efficiency and robust computational capacity, enabling a seamless transition to advanced application processing.
An evolution of the Y180, the Y180S offers a safe-state version of its predecessor, encompassing approximately 10K gates. This enhanced version is tailored for applications where safety and state retention are critical, maintaining all the beneficial features of the Y180 while incorporating additional safety mechanisms. Its architecture remains compatible with Z80 instruction sets, ensuring consistent integration across platforms necessitating reliable and secure processing.
The Y8002 microprocessor is a replication of a known Zilog device, with a gate count of approximately 15K. Designed to offer consistent performance aligned with Zilog's benchmarks, it supports projects requiring both reliability and compatibility with Zilog's infrastructure. Its gate efficiency and operational familiarity make it an optimal choice for tasks needing precision alongside established interface standards.
The Y51 processor utilizes the 8051 Instruction Set Architecture, operating with a 2-clock machine cycle for streamlined execution. This design is optimized for tasks that require swift, efficient instruction handling while maintaining architectural simplicity. The balanced configuration facilitates rapid processing, making it suitably versatile for various embedded systems that benefit from the established 8051 architecture.
The NeuroSense AI Chip is a remarkable innovation for wearable technology, designed to address the key pain points of power consumption and data privacy in mass-market devices. It significantly enhances the accuracy of heart rate measurements and human activity recognition, operating independently of the cloud. The chip processes data at the sensor level, which not only increases precision but also extends battery life, a crucial factor for fitness trackers, smartwatches, and health monitoring devices. With unparalleled power efficiency, the NeuroSense chip maintains high accuracy by implementing analog computation and neural network strategies, translating to more effective biometrics extraction. NeuroSense excels in reducing the typical power burdens of AI-capable wearables. The diminutive size allows for easy integration into small devices without compromising functionality. By bypassing the need for cloud data processing, it ensures faster response times and greater privacy for users. Its capacity to learn from and accurately classify human activity transcends simple monitoring, offering potential expansions into fields like exercise coaching and senior care. Additionally, the NeuroSense chip allows for extended device operation times, which conventional sensor units struggle to deliver. It supports a broader range of applications by making wearables more intelligent and adaptive to various user needs. This positions the NeuroSense as a leading choice for developers seeking to enhance product features while minimizing cost and energy demands.
The Rabbit 2000 microprocessor is a compact yet powerful design consisting of 19K gates and supports 100 pins. Tailored for seamless integration across various technologies, this microprocessor offers platform independence that ensures high adaptability in design implementation. It exemplifies a balanced architecture, achieving efficient performance while maintaining modest resource usage, making it ideal for a range of applications requiring robust control and processing capabilities.
The RV32EC_P2 Processor Core is a compact, high-efficiency RISC-V processor designed for low-power, small-scale embedded applications. Featuring a 2-stage pipeline architecture, it efficiently executes trusted firmware. It supports the RISC-V RV32E base instruction set, complemented by compression and optional integer multiplication instructions, greatly optimizing code size and runtime efficiency. This processor accommodates both ASIC and FPGA workflows, offering tightly-coupled memory interfaces for robust design flexibility. With a simple machine-mode architecture, the RV32EC_P2 ensures swift data access. It boasts extended compatibility with AHB-Lite and APB interfaces, allowing seamless interaction with memory and I/O peripherals. Designed for enhanced power management, it features an interrupt system and clock-gating abilities, effectively minimizing idle power consumption. Developers can benefit from its comprehensive toolchain support, ensuring smooth firmware and virtual prototype development through platforms such as the ASTC VLAB. Further distinguished by its vectored interrupt system and support for application-specific instruction sets, the RV32EC_P2 is adaptable to various embedded applications. Enhancements include wait-for-interrupt commands for reduced power usage during inactivity and multiple timer interfaces. This versatility, along with integrated GNU and Eclipse tools, makes the RV32EC_P2 a prime choice for efficient, low-power technology integrations.
The Nerve IIoT Platform by TTTech Industrial Automation is a sophisticated edge computing solution that bridges the gap between industrial environments and digital business models. Designed for machine builders, it supports real-time data exchange, offering a robust infrastructure that connects physical machines directly with IT systems. The platform optimizes machine performance by allowing for remote management and software deployment. Nerve's architecture is highly modular, making it adaptable to specific industrial needs. It features cloud-managed services that enable seamless application deployments across multiple devices, straight from the cloud or on-premises infrastructure. By supporting various hardware, from simple gateways to industrial PCs, the platform is scalable and capable of growing with business demands. Security is a pivotal aspect of Nerve, offering both IEC 62443 certification for safe deployment and regular penetration tests to ensure integrity and protection. Its integration capabilities with protocols like OPC UA, MQTT, and others allow for enhanced data collection and real-time analytics, promoting efficiency and reducing operational costs through predictive maintenance and system optimization.
At the pinnacle of the Rabbit microprocessor line is the Rabbit 6000, featuring an expansive 760K gate architecture paired with a 292-pin configuration. Designed for cutting-edge technology demands, this processor excels in environments that require maximum performance, reliability, and integration. Whether for ambitious digital projects or high-performance computing solutions, the Rabbit 6000 offers unparalleled processing power and design flexibility, assuring adaptability across multiple platforms and systems.
The DQ80251 is a revolutionary microcontroller core, executing instructions with an ultra-high-performance quad-pipelined architecture. This core is optimized for both 16-bit and 32-bit embedded applications, offering unmatched speed and reliability. It supports classic 8051 instruction compatibility while pushing the limits with enhancements that accelerate processing power significantly. With a small gate size of 13,500 and the ability to handle 8MB code space, the DQ80251 core also climbs to a performance level of 75.08 DMIPS, making it a vital component in applications demanding quick data processing.
iCEVision is an evaluation platform for the iCE40 UltraPlus FPGA featuring rapid prototyping capabilities for connectivity functions. It allows designers to test key connectivity features, facilitating quick solution implementation and confirmation of design integrity. iCEVision supports common camera interfaces such as ArduCam CSI and PMOD, aiding in seamless integration into existing workflows. Compatible with tools like Lattice Diamond Programmer and iCEcube2, which are available for free download, iCEVision supports customization by allowing easy reprogramming of onboard SPI Flash. This platform is equipped with practical user interfaces to ensure simple connectivity and programming. Designed with a streamlined user experience in mind, iCEVision includes preloaded RGB demo applications and a bootloader for straightforward USB programming. This makes it an excellent choice for developers aiming to maximize productivity and ensure robust device connections.
The Neuropixels Probe is a groundbreaking tool that provides researchers with comprehensive insights into brain functions by allowing simultaneous recording of electrical activity from hundreds of neurons. Imec’s innovation in neural probe technology facilitates experiments that were previously unattainable due to the limited scale of conventional methods. Developed in collaboration with world-leading neuroscience experts, the Neuropixels Probe delivers unprecedented data quality and scale in neural recording. Featuring a high-density array of electrodes, the probe captures wide-ranging data from distinct neuronal circuits across the brain, enabling researchers to unlock new understandings of complex neural activities and disease processes. The probe's capability to monitor minute changes over time enhances its utility in neuroscience research focused on brain disorders, neural computation, and cognitive processes. Imec's Neuropixels Probe combines precision engineering with advanced semiconductor technologies to meet the demanding requirements of neuroscience research. Ensuring minimal invasive interference thanks to its ultra-fine construction, it’s a pivotal development tool in modern neuroscience labs. The adaptability and precision of the Neuropixels Probe significantly enhance the scope of neuro-research methodologies, ultimately paving the way for breakthroughs in understanding brain networks and developing therapeutic strategies.
Built with a focus on versatility and resource efficiency, the Rabbit 3000 microprocessor expands on its predecessor with a gate count of 31K and 128 pins. This design accommodates more complex applications and demands, offering greater processing power while sustaining high levels of flexibility and integration. Ideal for sophisticated systems, the Rabbit 3000 balances enhanced computational capabilities with effective resource distribution while ensuring seamless functionality across various platforms.
The Rabbit 5000 takes processing efficiency to new heights with its extensive 540K gate count and substantial 289 pin configuration. Engineered for high-end, complex applications, this processor excels in systems demanding advanced computational power and high data throughput. Its expansive architecture accommodates intricate processing requirements while ensuring robust compatibility across a plethora of platforms, making it a formidable choice for expansive and demanding digital ecosystems.
The RISC-V CPU IP N Class presents a powerful 32-bit architecture designed for microcontrollers and AIoT applications. Highly configurable to meet diverse application demands, this class supports robust security and functional safety features, making it suitable for a wide range of uses. The N Class confidently aligns with the stringent requirements of modern electronics while providing high-efficiency performance. This processor class benefits from an architecture that supports rapid customization, ensuring that each design can be finely tuned to optimize for specific functionalities and applications. Its compliance with the RISC-V standard assures users of open-source flexibility and interoperability with existing RISC-V ecosystems. Furthermore, the N Class comes with a wide array of development tools, including SDKs and RTOS support, facilitating seamless deployment. Emphasizing security, the N Class processors include features such as secure boot and encryption support. These processors are ideal for industries needing reliable and scalable computing, achieving high performance with low power consumption, making them a valuable asset for next-generation technological solutions.
The RV32IC_P5 Processor Core from IQonIC Works is designed for medium-scale embedded applications requiring higher performance and enhanced processing capabilities. This 5-stage pipeline processor supports the RISC-V RV32I base instruction set, alongside standard extension instructions such as 'A' for atomic operations, boosting system efficiency. Its ability to run a mix of trusted firmware and user applications allows for diverse operational integration. Supporting both ASIC and FPGA design flows, the RV32IC_P5 incorporates advanced memory interfaces, offering optional instruction and write-back data caches for improved performance and adaptability. It features a tightly-coupled scratchpad memory architecture, ensuring efficient data handling and reduced latency. The processor's architecture also incorporates AHB-Lite interfaces and optional physical memory protections for robust security management. With a vectored interrupt system and support for platform-specific instruction extensions, the RV32IC_P5 provides tailored options for DSP operations. Its toolchain support includes GNU and Eclipse environments, affording developers a streamlined path from concept to execution. The RV32IC_P5 demonstrates a firm focus on power efficiency and enhanced processing capabilities, making it ideal for complex applications demanding reliable processing power and flexibility.
The Low Power RISC-V CPU IP from SkyeChip delivers power-efficient processing tailored for embedded applications. It fully supports the RISC-V RV32 instruction set with complete support for the 'I' and 'C' subsets while offering machine mode operations and a vectorized interrupt framework. This optimizes the processor for low-power operation in constrained environments, making it ideal for innovative and flexible IoT applications.
The 32-bit RISC CPU Core from VinChip Systems is designed to deliver enhanced processing power suitable for embedded system applications. This CPU core is ideal for resource-constrained environments where energy efficiency and performance are critical. It adopts a Reduced Instruction Set Computing (RISC) architecture, streamlined to execute simpler instruction sets with more efficiency, thereby enabling faster performance and lower power consumption. This architecture is particularly advantageous for applications needing quick response times without compromising on power usage. With capability to be integrated across various platforms, the VinChip RISC core provides versatility for manufacturers building systems across different sectors, including communications, computing, and consumer electronics. This CPU core is supplemented by comprehensive software stacks to aid in application development and deployment.
Advanced Silicon's Specialty Microcontrollers are architecturally innovative RISC-V based solutions tailored for high-performance applications like image processing. Encompassing cutting-edge co-processing units, these microcontrollers redefine potential in embedded system functionalities. The controllers integrate both performance and practicality, enabling sophisticated algorithms crucial for modern image processing tasks. They come embedded with touch firmware featuring machine learning algorithms that handle user input recognition, enhancing interactive user interfaces. This positions Advanced Silicon at the forefront of the industry, propelling user-friendly and intuitive technology solutions. Their SOC Touch Controllers are structured on a 32-bit RISC architecture, featuring integrated capacitive AFE interfaces, power management units, and robust communication interfaces, suited for smaller touch screens ranging between 10 to 27 inches. For larger screens, up to 84 inches, their multi-chip solutions combine advanced 32-bit DSP architecture with powerful capacitive sensing AFEs, offering comprehensive performance for interactive applications.
The ARM M-Class Based ASICs provide a versatile platform leveraging the ARM® Cortex-M series of processors. These processors are ideal for building custom ASIC solutions that cater to varying processing needs across industries. By integrating different memory configurations and supporting multiple peripheral protocols, these ASICs can efficiently combine processing cores, sensors, and communication IP into a single cohesive solution. ASIC North capitalizes on this platform to develop an ASIC development platform aimed at custom ARM Cortex-M based devices, focusing on easy integration of complex circuit blocks. This solution addresses common challenges in development, such as achieving ultra-low power consumption and advanced security features, crucial for devices like IoT endpoints. With expertise in low power architecture, ASIC North designs devices capable of long, battery-based field deployments while ensuring robust data security through features like physically unclonable functions and hardware encryption. This comprehensive solution leverages the capabilities of the ARM platform and enriches device functionality with optimized software and firmware stacks.
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