All IPs > Network on Chip
Network on Chip (NoC) semiconductor IP is a pivotal element in the design and development of highly integrated electronic systems and chips. As devices become more complex and contain multiple processing units, effective communication through reliable interconnections is crucial. NoC IPs provide a scalable and efficient way to connect various intellectual properties (IPs) within a system on chip (SoC), enabling improved data transfer, performance, and power efficiency.
In modern multicore processor architectures, the traditional bus-based communication faces challenges with scalability, latency, and energy consumption. NoC IPs address these issues by offering packet-based communication paradigms, which are structured like networks to efficiently manage data flow between cores, memory controllers, and peripheral interfaces. This technology is vital for a range of applications including data centers, mobile processors, automotive systems, and beyond. It not only helps in breaking the bandwidth bottleneck but also enhances the overall performance of the system.
A detailed exploration of the Network on Chip category reveals various types of IPs designed to cater to different specific needs, including low-latency networks, high-bandwidth connections, and power-conserving interfaces. Developers and designers can choose from pre-verified solutions by leading vendors, ensuring reliability and reducing time to market. Functionalities offered by these IP solutions might include advanced routing algorithms, traffic prioritization, security features, and error correction mechanisms.
Furthermore, semiconductor IPs in the Network on Chip category are continuously evolving to support emerging technologies such as AI, IoT, and 5G. This makes NoC IPs not only a fundamental infrastructure element but also a key enabler of future technological advancements. Companies seeking to develop state-of-the-art, fully integrated SoCs will find the NoC IP category indispensable in constructing efficient and robust systems capable of meeting current and future demands.
SkyeChip's Coherent Network-on-Chip (NOC) is an innovative, scalable solution designed to support memory coherent systems. Engineered to decrease routing congestion in many-core systems, it effectively utilizes nodes like ACE4, ACE5, and CHI protocols. Operating efficiently at frequencies up to 2GHz, it complements SkyeChip’s Non-Coherent NOC for integrated and partitioned interconnect systems. The solution’s focus on reducing silicon usage makes it a prime candidate for applications where performance and area efficiency are paramount, ensuring seamless system integration with high coherency requirements.
The Non-Coherent Network-on-Chip (NOC) by SkyeChip is designed to optimize bandwidth and latency for various ICs, focusing on reducing power and area needs while enhancing performance metrics. The solution supports a multitude of protocols such as AXI4, AXI5, and APB, thereby providing excellent routing and operation flexibility. It handles operating frequencies up to 2GHz, providing a robust platform for efficient IC interconnections. Its architecture supports both source synchronous and synchronous clocking models, making it suitable for high-frequency applications, while integrating seamlessly with SkyeChip's Coherent NOC.
The NoC Bus Interconnect is designed to provide high performance and adaptability in SoC design. Utilizing the proprietary HyperPath technology, it achieves twice the performance of standard interconnects, all while maintaining low latency and high flexibility. It allows for seamless routing across different layers, supporting extreme speed and efficient power usage. The interconnect includes safety and security features such as ECC and at-speed BIST, ensuring reliability in system communications. Designed with architectural flexibility, it caters to a wide range of high-speed, low-power applications.
The NOC-X technology offers a revolutionary approach to interconnect chip architectures, enabling efficient communication pathways across multi-core processors. Aimed at high-demand data-centric applications, it optimizes signal transmission for enhanced processing efficacy and reduced bottlenecks across complex computational frameworks. NOC-X leverages a digital-centric approach to network on chip design, minimizing power consumption without compromising on data exchange speeds. This IP is crucial for scenarios where rapid, reliable communication across various cores is paramount, ensuring that all parts of the system efficiently interact in real-time. This capability is essential for data-heavy industries pushing the boundaries of technology. Supporting tech nodes from 12nm to 28nm, NOC-X is adaptable to a wide range of applications, from consumer electronics to high-performance computing solutions. Its introduction into chiplet technology opens avenues for scalable, adaptable systems that can evolve with advancing technological demands, delivering significant gains in speed and operational efficiency.
The Bluetooth LE Audio Solutions offered by Packetcraft represent a full spectrum approach to enable seamless migration and integration into Bluetooth LE Audio standards. This comprehensive offering includes a range of host, controller, and LC3 codec functions designed to optimize and facilitate the deployment of these audio technologies. The solution provides support for Auracast broadcast audio, which significantly enhances the potential for audio sharing and TWS stereo setups, delivering unprecedented flexibility for diverse product applications. The integration of these technologies into popular chipsets ensures that companies can leverage Packetcraft's solutions for easy and efficient product development in the wireless audio landscape. Designed to drive innovation and uphold superior audio quality, these solutions encapsulate Packetcraft's dedication to forward-thinking technical advancements in the field of wireless communications. Companies can achieve a competitive edge in the market by adopting these flexible and compatible solutions, which are already configured for several leading semiconductor platforms. This adaptability enables a smoother transition to the new Bluetooth audio standards, ensuring companies are well-equipped to address specific market needs and consumer expectations. Moreover, Packetcraft’s Bluetooth LE Audio Solutions are fortified with ongoing maintenance and expert support, empowering consumer electronics, industrial, and automotive sectors with robust, market-ready implementations. This comprehensive strategy allows companies to remain on the cutting edge of audio technology and to quickly tailor their offerings to resonate with emerging consumer demands.
aiSim 5 is aiMotive's state-of-the-art ISO26262 ASIL-D certified simulator designed to accelerate and optimize the validation process of Advanced Driver Assistance Systems (ADAS) and automated driving (AD) software. Its core components leverage AI-based rendering and highly optimized sensor simulation to establish a new standard in automotive simulation, delivering unmatched realism and adaptiveness. This cutting-edge tool allows for extensive multisensor environments, supporting over 20 cameras, 10 radars, and numerous lidars, thereby offering an authentic, comprehensive testing platform for autonomous systems. A testament to aiSim 5's capabilities is its robust 3D asset library and versatile content pipeline. These facilitate the creation and deployment of complex, high-fidelity environments crucial for thorough ADAS and AD software validation. Additionally, the simulator provides a cloud-native UI and open SDK, giving developers ample flexibility to create custom test scenarios and seamlessly integrate them into existing toolchains. Its proprietary aiSim AIR engine plays a pivotal role, delivering high-quality virtual sensor data streams while maintaining efficient resource use. The engine supports distributed rendering and balances workload by allowing asynchronous data transfer, further elevating the simulator's performance and ensuring compliance with stringent automotive standards.
HUMMINGBIRD is a revolutionary optical network-on-chip processor aimed at addressing demanding AI workloads. By integrating a photonic and electronic die into a single package through advanced vertically stacked packaging technology, it offers a breakthrough approach for overcoming the limitations of memory bandwidth and latency. This innovative design allows integration with silicon photonics, enabling an all-to-all data broadcast network across multiple cores of an AI processor chip. This setup substantially enhances communication efficiency, reducing both power usage and latency. Unlike traditional networks, HUMMINGBIRD's architecture allows for improved density scaling and mapping freedom for computational tasks. Its co-packaging in a PCIe form factor makes HUMMINGBIRD suitable for high-performance data centers, providing interoperability and support for AI tasks through the Lightelligence Software Development Kit (SDK). This system not only facilitates superior workload management but also sets a new standard for high-performance computing solutions in data centers.
Eliyan’s NuLink Die-to-Die (D2D) PHY technology is designed to revolutionize the interconnection of chiplets using industry-standard packaging techniques. This technology offers low power consumption while maintaining high-performance metrics, seamlessly integrating into both standard and advanced packaging options. Eliyan's D2D IP allows for significant flexibility in application design and reduces the dependency on complex silicon interposer technologies. By using standard organic/laminate packages, the NuLink technology enhances system-level design optimizations, cost savings, and thermal performance. Support for numerous industry standards, including UCIe and BoW, ensures a versatile application in a wide array of semiconductor designs. The tailored PHY IP cores facilitate the incorporation of high-bandwidth interconnected systems within ASICs without the necessity of proprietary packaging methods. With up to 64 data lanes and bump map layouts adaptable to specific protocols, the NuLink D2D PHY exemplifies adaptable technology suitable for various semiconductor applications. This unique approach allows for greater design flexibility, mixing and matching chiplets with different dimensions, which is particularly beneficial in applications involving high bandwidth and low latency requirements. The ability of the NuLink D2D technology to deliver interposer-like bandwidth and power without high-cost advanced packaging makes it a remarkable solution in cutting-edge chip design.
The ORBIT Memory Subsystem is a highly integrated solution that combines interconnects, memory controllers, and PHYs to create a synergistic memory management environment. Primarily targeted at AI chips, it offers features like reduced latency, energy conservation, and broad DRAM protocol support, which are crucial for extending product lifecycles and increasing competitive edge. The product includes ActiveQoS technology that ensures low-latency memory access and optimal traffic management. By leveraging an automated configuration system, users can easily adapt the memory subsystem to diverse application requirements, making it a versatile solution for various market demands.
Channel Sounding technology is an innovative solution provided by Packetcraft that offers precise distance measurement and location finding capabilities within Bluetooth technology. This cutting-edge solution caters to a variety of applications, notably enhancing the accuracy and utility of distance measurement within Bluetooth protocols. Built to offer competitive use cases, Channel Sounding opens up expansive possibilities for both consumer and industrial applications through its ability to provide high precision in spatial measurements. Packetcraft’s implementation of Channel Sounding is revolutionary, marking a significant leap forward in Bluetooth technology’s ability to enhance device interaction through spatial awareness. By incorporating advanced algorithms and technical insights, the solution enables devices to accurately measure gaps and improve localization performance, which can be utilized in areas such as automotive applications and consumer electronics. This novel technology is now immediately available on Packetcraft's controllers, showcasing the company's readiness to bring operational and commercial benefits to a wide range of industries. Through its deployment, companies can explore new dimensions in wireless communication, leveraging enhanced data on proximity and environmental interaction to optimize product offerings and consumer engagements.
The NoC Coherent Crossbar Silicon IP from Truechip offers a high-efficiency structure for interconnecting protocol buses within a System-on-Chip (SoC) environment. By providing hardware cache coherence with software maintenance, this IP drastically reduces the interconnection complexity, ensuring minimal latency, power usage, and area footprint. It is highly customizable, with features that support a realm of options tailored for specific master and slave port configurations. The IP supports various AMBA protocols and is capable of handling ports with different data widths, accommodating the nuanced needs of advanced chip designs. Its ability to toggle between coherence modes allows for a broad range of functionality suited to varied operational contexts. Verification is robust, with comprehensive regression test suites and detailed documentation provided to simplify integration and operation. Truechip's NoC Coherent Crossbar IP not only ensures efficient data handling and transfer but also rounds off the potential for design flexibility and scalability, making it an essential component for modern SoC architectures.
The NoC Crossbar Silicon solution by Truechip delivers an efficient system for linking multiple protocol-supporting devices within an integrated chip structure. This silicon solution is crucial for minimizing latency, power consumption, and chip area while ensuring robust connections between protocol buses. It offers hardware cache coherency while maintaining software-driven cache consistency. Truechip's NoC Crossbar Silicon IP boasts a high level of customization, allowing designers to tweak configurations uniquely suited to their project requirements. With comprehensive verification through Verilog regression test suites and 100% code coverage, the NoC Crossbar Silicon provides reliability across various scenarios. Additional benefits include consistency across interfaces and operations, supported through a GUI-based configuration. This IP incorporates crucial technological features like complex network configurations, spanning acyclic agent graphs and parallel NoC implementations. It affords broad configurability across master and slave ports and supports AMBA and TileLink protocols, among others, effectively managing multiple ports with varying data widths, thereby enhancing the adaptability and efficiency of chip architectures.
Truechip’s NoC Mesh Silicon IP is integral for designing highly efficient chip architecture, enabling fluid connection between a wide array of protocol buses. This IP excels at reducing interconnect complexity, which directly contributes to decreases in latency and power consumption while maintaining optimal chip area. The NoC Mesh Silicon is extremely flexible, supporting a range of complex network setups including layered networks and robust routing algorithms. Adopting advanced protocols such as AMBA and TileLink, it supports a multitude of master and slave ports with configurable memory maps. This versatility allows designers to meet specific application requirements with ease. Furthermore, the NoC Mesh Silicon is thoroughly verified with comprehensive test suites, assuring high reliability and performance. Detailed documentation guides users through integration and operation processes, ensuring a seamless implementation into various chip designs. Additionally, tools for graphical visualization and debugging enhance user experience, facilitating efficient troubleshooting and design optimization.