All IPs > Multimedia
In the rapidly evolving world of semiconductors, multimedia semiconductor IPs play a crucial role in enabling and enhancing digital media experiences across various electronic devices. This category encompasses a broad range of intellectual properties tailored for multimedia processing, from audio and video codecs to graphical interfaces, essential for consumer electronics, mobile devices, broadcasting equipment, and more. As technology advances, so too do the demands for higher performance, better quality, and increased efficiency in multimedia signal processing.
This category is home to subcategories that feature cutting-edge technologies and industry standards in multimedia processing. 2D and 3D rendering IPs lead the visual innovation charge, offering essential tools for developing immersive user interfaces and gaming experiences. Advanced audio interfaces, including ADPCM and WMA IPs, provide high-quality sound reproduction and compression, essential for both professional audio systems and consumer devices.
One of the highlights of the multimedia IP category is video compression technology. Standards like H.264, H.265, and the new H.266 are crucial for streaming services, broadcasting, and digital video recorders, offering solutions that reduce data rates while maintaining video quality. Image processing IPs including JPEG, JPEG 2000, and MPEG standards, ensure efficient image storage and retrieval, vital for digital cameras and web applications.
Additionally, interface IPs such as HDMI, Camera Interface, and MHL provide seamless connectivity, enabling efficient data transfer between devices. With innovations such as AV1 for open-source video coding, and emerging technologies like TICO and MPEG 5 LCEVC, our catalog covers both established and avant-garde solutions for multimedia applications. These semiconductor IPs empower developers and manufacturers to deliver next-generation multimedia experiences, ensuring devices meet the modern consumer's expectations for quality and performance.
Overview: CMOS Image Sensors (CIS) often suffer from base noise, such as Additive White Gaussian Noise (AWGN), which deteriorates image quality in low-light environments. Traditional noise reduction methods include mask filters for still images and temporal noise data accumulation for video streams. However, these methods can lead to ghosting artifacts in sequential images due to inconsistent signal processing. To address this, this IP offers advanced noise reduction techniques and features a specific Anti-ghost Block to minimize ghosting effects. Specifications: Maximum Resolution o Image : 13MP o Video : 13MP@30fps -Input formats : YUV422–8 bits -Output formats o DVP : YUV422-8 bits o AXI : YUV420, YUV422 -8 bits-Interface o ARM® AMBA APB BUS interface for ISP system control o ARM® AMBA AXI interface for data o Direct connection to sensor stream data (DVP) Features: Base Noise Correction: AWGN reduction for improved image quality Mask Filter: Convolution-based noise reduction for still images Temporal Noise Data Accumulation: Gaussian Distribution-based noise reduction for video streams using 2 frames of images 3D Noise Reduction (3DNR): Sequential image noise reduction with Anti-ghost Block Motion Estimation and Adaptive: Suppresses ghosting artifacts during noise reduction Real-Time Processing: Supports Digital Video Port (DVP) and AXI interfaces for seamless integration Anti-Ghost Real time De-noising output
Overview: Lens distortion is a common issue in cameras, especially with wide-angle or fisheye lenses, causing straight lines to appear curved. Radial distortion, where the image is expanded or reduced radially from the center, is the most prominent type. Failure to correct distortion can lead to issues in digital image analysis. The solution involves mathematically modeling and correcting distortion by estimating parameters that determine the degree of distortion and applying inverse transformations. Automotive systems often require additional image processing features, such as de-warping, for front/rear view cameras. The Lens Distortion Correction H/W IP comprises 3 blocks for coordinate generation, data caching, and interpolation, providing de-warping capabilities for accurate image correction. Specifications: Maximum Resolution: o Image: 8MP (3840x2160) o Video: 8MP @ 60fps Input Formats: YUV422 - 8 bits Output Formats: o AXI: YUV420, YUV422, RGB888 - 8 bits Interface: o ARM® AMBA APB BUS interface for system control o ARM® AMBA AXI interface for data Features: Programmable Window Size and Position Barrel Distortion Correction Support Wide Angle Correction up to 192° De-warping Modes: o Zoom o Tilt o Pan o Rotate o Side-view Programmable Parameters: o Zoom Factor: controls Distance from the Image Plane to the Camera (Sensor)
Overview: The Camera ISP IP is an Image Signal Processing (ISP) IP developed for low-light environments in surveillance and automotive applications, supporting a maximum processing resolution of 13 Mega or 8Mega Pixels (MP) at 60 frames per second (FPS). It offers a configurable ISP pipeline with features such as 18x18 2D/8x6 2D Color Shading Correction, 19-Point Bayer Gamma Correction, Region Color Saturation, Hue, and Delta L Control functions. The ISP IP enhances image quality with optimal low-light Noise/Sharp filters and offers benefits such as low gate size and memory usage through algorithm optimization. The IP is also ARM® AMBA 3 AXI protocol compliant for easy control via an AMBA 3 APB bus interface. Specifications: Maximum Resolution: o Image: 13MP/8MP o Video: 13MP @ 60fps / 8MP @ 60fps Input Formats: Bayer-8, 10, 12, 14 bits Output Formats: o DVP: YUV422, YUV444, RGB888 - 8, 10, 12 bits o AXI: YUV422, YUV444, YUV420, RGB888 - 8, 10, 12 bits Interface: o ARM® AMBA APB BUS interface for ISP system control o ARM® AMBA AXI interface for data o Direct connection to sensor stream data (DVP) o Features: Defective Pixel Correction: On-The-Fly Defective Pixel Correction 14-Bit Bayer Channel Gain Support: Up to x4 / x7.99 with Linear Algebra for Input Pixel Level Adjustment Gb/Gr Unbalance Correction: Maximum Correction Tolerance Gb/Gr Rate of 12.5% 2D Lens-Shading Correction: Supports 18x18 / 8x6 with Normal R/Gb/Gr/B Channel Shading Correction and Color Stain Correction High-Resolution RGB Interpolation: Utilizes ES/Hue-Med/Average/Non-Directional Based Hybrid Type Algorithm Color Correction Matrix: 3x3 Matrix Bayer Gamma Correction: 19 points RGB Gamma Correction: 19 points Color Enhancement: Hue/Sat/∆-L Control for R/G/B/C/M/Y Channels High-Performance Noise Reduction: For Bayer/RGB/YC Domain Noise Reduction High-Resolution Sharpness Control: Multi-Sharp Filter with Individual Sharp Gain Control Auto Exposure: Utilizes 16x16 Luminance Weight Window & Pixel Weighting Auto White Balance: Based on R/G/B Feed-Forward Method Auto Focus: 2-Type 6-Region AF Value Return
Overview: RCCC and RCCB in ISP refer to Red and Blue Color Correction Coefficients, respectively. These coefficients are utilized in Image Signal Processing to enhance red and blue color components for accurate color reproduction and balance. They are essential for color correction and calibration to ensure optimal image quality and color accuracy in photography, video recording, and visual displays. The IP is designed to process RCCC pattern data from sensors, where green and blue pixels are substituted by Clear pixel, resulting in Red or Clear (Monochrome) format after demosaicing. It supports real-time processing with Digital Video Port (DVP) format similar to CIS output. RCCB sensors use Clear pixels instead of Green pixels, enhancing sensitivity and image quality in low-light conditions compared to traditional RGB Bayer sensors. LOTUS converts input from RCCB sensors to a pattern resembling RGB Bayer sensors, providing DVP format interface for real-time processing. Features: Maximum Resolution: 8MP (3840h x 2160v) Maximum Input Frame Rate: 30fps Low Power Consumption RCCC/RCCB Pattern demosaicing
Overview: Human eyes have a wider dynamic range than CMOS image sensors (CIS), leading to differences in how objects are perceived in images or videos. To address this, CIS and IP algorithms have been developed to express a higher range of brightness. High Dynamic Range (HDR) based on Single Exposure has limitations in recreating the Saturation Region, prompting the development of Wide Dynamic Range (WDR) using Multi Exposure images. The IP supports PWL companding mode or Linear mode to perform WDR. It analyzes the full-image histogram for global tone mapping and maximizes visible contrast in local areas for enhanced dynamic range. Specifications: Maximum Resolution: o Image: 13MP o Video: 13MP @ 60fps (Input/Output) Input Formats (Bayer): o HDR Linear Mode: Max raw 28 bits o Companding Mode: Max PWL compressed raw 24 bits Output Formats (Bayer): 14 bits Interface: o ARM® AMBA APB BUS interface for ISP system control o ARM® AMBA AXI interface for data o Video data stream interface Features: Global Tone Mapping based on histogram analysis o Adaptive global tone mapping per Input Images Local Tone Mapping for adaptive contrast enhancement Real-Time WDR Output Low Power Consumption and Small Gate Count 28-bit Sensor Data Interface
Overview: RGB-IR features in ISP enable the capture and processing of Red, Green, Blue, and Infrared (IR) light data in an Image Signal Processing (ISP) system. This functionality enhances image quality by extracting additional information not visible to the human eye in standard RGB images. By integrating IR and RGB data into the demosaic processing pipeline, the ISP can enhance scene analysis, object detection, and image clarity in applications such as surveillance, automotive, and security systems. Features: IR Core - 4Kx1EA: 4K Maximum Resolution: 3840h x 2160v @ 30fps IR Color Correction 3.99x support IR data Full-size output / 1/4x subsample support (Pure IR Pixel data) Only RGB-IR 4x4 pattern support IR data Crop support
The KL730 AI SoC is equipped with a state-of-the-art third-generation reconfigurable NPU architecture, delivering up to 8 TOPS of computational power. This innovative architecture enhances computational efficiency, particularly with the latest CNN networks and transformer applications, while reducing DDR bandwidth demands. The KL730 excels in video processing, offering support for 4K 60FPS output and boasts capabilities like noise reduction, wide dynamic range, and low-light imaging. It is ideal for applications such as intelligent security, autonomous driving, and video conferencing.
KPIT's digital solutions harness cloud and edge analytics to modernize vehicle data management, optimizing efficiency and security in connected mobility. With a focus on overcoming data overload and ensuring compliance with regulatory standards, these solutions enable secure and scalable cloud environments for vehicle connectivity. The edge computing aspect enhances system responsiveness by processing data within vehicles, promoting innovation and dynamic feature development.
The Metis AIPU PCIe AI Accelerator Card provides an unparalleled performance boost for AI tasks by leveraging multiple Metis AIPUs within a single setup. This card is capable of delivering up to 856 TOPS, supporting complex AI workloads such as computer vision applications that require rapid and efficient data processing. Its design allows for handling both small-scale and extensive applications with ease, ensuring versatility across different scenarios. By utilizing a range of deep learning models, including YOLOv5 and ResNet-50, this AI accelerator card processes up to 12,800 FPS for ResNet-50 and an impressive 38,884 FPS for MobileNet V2-1.0. The card’s architecture enables high throughput, making it particularly suited for video analytics tasks where speed is crucial. The card also excels in scenarios that demand high energy efficiency, providing best-in-class performance at a significantly reduced operational cost. Coupled with the Voyager SDK, the Metis PCIe card integrates seamlessly into existing AI systems, enhancing development speed and deployment efficiency.
KPIT's engineering and design solutions focus on accelerating vehicle development through new-age design and simulation techniques. This approach enables cost-efficient transformation and adherence to sustainability standards, offering integrated electrification solutions and cutting-edge design methodologies. KPIT's solutions in vehicle engineering support electric and hybrid vehicle innovation with advanced CAD tools, virtual prototyping, and AI augmentation.
WAVE6 is a sophisticated multi-standard video codec designed to handle an array of video standards such as AV1, HEVC, AVC, and VP9. Capable of efficiently managing high-resolution video encoding and decoding processes, WAVE6 offers unmatched performance for applications demanding 4K and 8K resolutions. The technology incorporates a dual-core architecture that doubles operational efficiency and is crucial for high-throughput sectors like data centers and surveillance systems. Key features include support for color depth adaptations ranging from 8-bit to 10-bit and advanced power efficiency mechanisms. The WAVE6 codec is notable for incorporating features such as Chips&Media’s unique lossless frame buffer compression technology, CFrame™, to significantly minimize external memory bandwidth usage. With a streamlined architecture that simplifies video processing tasks, this codec supports multiple interface standards, enhancing your system's scalability and integration. High versatility makes WAVE6 a preferred choice for modern multimedia processing units, providing effective solutions for bandwidth challenges while maintaining superior image quality. WAVE6's efficient resource management and multi-instance capabilities make it a standout product in environments requiring low power consumption and high output precision. It facilitates color space conversion, bit-depth switching, and offers secondary interface options, tailoring it for a diverse range of implementation scenarios, from mobile technology to media broadcasting facilities.
Archband Labs offers a PDM-to-PCM Converter that excels in translating Pulse Density Modulated (PDM) audio signals into Pulse Code Modulated (PCM) format. This conversion is crucial in audio signal processing where digital formats require conversions for accurate playback or further audio processing. Ideal for modern multimedia systems and portable audio devices, the PDM-to-PCM Converter provides high fidelity in signal conversion, ensuring sound quality is preserved during the process. This IP is highly efficient, making it perfect for applications where power conservation is important, such as battery-powered gadgets and smart wearables. Its compact design provides easy integration into existing systems, facilitating upgrades without significant redesigns. With reliable performance, this converter supports the growing demand for adaptable and high-efficiency audio processing solutions, aiding engineers in achieving cutting-edge audio clarity.
The Metis AIPU M.2 Accelerator Module is a powerful AI processing solution designed for edge devices. It offers a compact design tailored for applications requiring efficient AI computations with minimized power consumption. With a focus on video analytics and other high-demand tasks, this module transforms edge devices into AI-capable systems. Equipped with the Metis AIPU, the M.2 module can achieve up to 3,200 FPS for ResNet-50, providing remarkable performance metrics for its size. This makes it ideal for deployment in environments where space and power availability are limited but computational demands are high. It features an NGFF (Next Generation Form Factor) socket, ensuring it can be easily integrated into a variety of systems. The module leverages Axelera's Digital-In-Memory-Computing technology to enhance neural network inference speed while maintaining power efficiency. It's particularly well-suited for applications such as multi-channel video analytics, offering robust support for various machine learning frameworks, including PyTorch, ONNX, and TensorFlow.
The H.264 FPGA Encoder and CODEC Micro Footprint Cores are designed to offer superior video compression capabilities, ensuring minimal latency with a remarkable sub-1ms delay for 1080p30. This licensable core is notable for its compliance with ITAR standards, making it adaptable for various strategic applications. It facilitates 1080p60 baseline support with a single compact core that's touted as the fastest and smallest in its class. These cores are customizable, allowing for tailored pixel depths and unique resolutions that can be modified based on the specific requirements of a project. Moreover, the flexibility of these cores extends to various encoding flavors, including H.264 Encoder, CODEC, and I-Frame Only Encoder, which further enhances their usage in a wide range of applications. A low-cost evaluation license is also available, making the cores accessible for diverse testing and development scenarios.
The AI Camera Module from Altek is an innovative integration of image sensor technology and intelligent processing, designed to cater to the burgeoning needs of AI in imaging. It combines rich optical design capabilities with software-hardware amalgamation competencies, delivering multiple AI camera models that assist clients in achieving differentiated AI + IoT needs. This flexible camera module excels in edge computing by supporting high-resolution requirements such as 2K and 4K, thereby becoming an indispensable tool in environments demanding detailed image analysis. The AI Camera Module allows for superior adaptability in performing functions such as facial detection and edge computation, thus broadening its applicability across industries. Altek's collaboration with major global brands fortifies the AI Camera Module's position in the market, ensuring it meets diverse client specifications. Whether used in security, industrial, or home automation applications, this module effectively integrates into various systems to deliver enhanced visual processing capabilities.
The KL630 AI SoC embodies next-generation AI chip technology with a pioneering NPU architecture. It uniquely supports Int4 precision and transformer networks, offering superb computational efficiency combined with low power consumption. Utilizing an ARM Cortex A5 CPU, it supports a range of AI frameworks and is built to handle scenarios from smart security to automotives, providing robust capability in both high and low light conditions.
Wasiela's DVB-S2-LDPC-BCH provides a sophisticated forward error correction system designed for digital video broadcasting applications, particularly suited for satellite transmission. This product combines low-density parity-check (LDPC) codes with Bose Chaudhuri Hocquenghem (BCH) codes to achieve quasi error-free operation, operating effectively close to the Shannon limit.<br><br>The implementation boasts an irregular parity check matrix and layered decoding to increase decoding efficiency. The minimum sum algorithm is utilized for optimal performance with soft decision decoding capabilities that allow for higher error correction. This product also complies with ETSI EN 302 307-1 V1.4.1 standards, ensuring high quality and reliability in digital transmission systems.<br><br>Additional functionalities include a BCH decoder adept at correcting multiple errors per codeword, making this solution an ideal choice for ensuring data integrity in demanding satellite communication conditions. Wasiela offers this IP complete with synthesizeable Verilog code, a system model in Matlab, and thorough documentation, ensuring a smooth integration process for any application.
The MIPITM V-NLM-01 is specialized for efficient image noise reduction using non-local mean (NLM) algorithms. This resourceful hard core supports parameterized search-window sizes and a customizable number of bits per pixel to enhance visual output quality remarkably. Designed to facilitate HDMI outputs at resolutions up to 2048×1080 at frame rates ranging from 30 to 60 fps, it delivers flexibility for numerous imaging applications. Its efficient implementation renders it suitable for tasks demanding high-speed processing and precise noise reduction in video outputs. The MIPITM V-NLM-01’s algebraic approach to noise reduction ensures exceptional image clarity and fidelity, making it indispensable for high-definition video processing environments. Its adaptability for variable processing requirements makes it a robust solution for current and future video standards.
The RT990 represents RafaelMicro's prowess in developing optical communication components, specifically for Cable Television (CATV) systems. This TIA excels in signal amplification, essential for clear, high-fidelity video and audio transmission across optical networks.
eSi-Comms represents EnSilica’s suite of communication IP blocks, designed to enhance modern communication systems through flexible, parameterized IP. These IPs are optimized for a range of air interface standards, including 4G, 5G, Wi-Fi, and DVB, providing a robust framework for both custom and standardized wireless designs.\n\nThe flexibility of eSi-Comms IP allows it to be configured for various interfacing standards, supporting high-level synchronization, equalization, and modulation techniques. The suite includes advanced DSP algorithms and control loops that ensure reliable communication links, vital for applications like wireless sensors and cellular networks.\n\nEnSilica also supports software-defined radio (SDR) applications by offering hardware accelerators compatible with processor cores like ARM, enhancing processing power while maintaining flexibility. This adaptability makes eSi-Comms IP a valuable asset in developing efficient, high-performance communication solutions that can quickly adapt to changing technological demands.
The G-Series Controller is designed for high-speed data processing tasks in graphical and video-intensive applications. It supports JEDEC-compliant GDDR6 for speeds up to 18 Gbps, offering dual channels with integrated automatic retry features and a highly flexible design architecture. Its support for a hardware and software calibration routine ensures accurate performance across platforms. The G-Series solution delivers the throughput needed for AI, ADAS, and advanced gaming technologies, establishing itself as a formidable solution for next-generation high-performance applications.
The Chimera GPNPU series stands as a pivotal innovation in the realm of on-device artificial intelligence computing. These processors are engineered to address the challenges faced in machine learning inference deployment, offering a unified architecture that integrates matrix, vector, and scalar operations seamlessly. By consolidating what traditionally required multiple processors, such as NPUs, DSPs, and real-time CPUs, into a single processing core, Chimera GPNPU reduces system complexity and optimizes performance. This series is designed with a focus on handling diverse, data-parallel workloads, including traditional C++ code and the latest machine learning models like vision transformers and large language models. The fully programmable nature of Chimera GPNPUs allows developers to adapt and optimize model performance continuously, providing a significant uplift in productivity and flexibility. This capability ensures that as new neural network models emerge, they can be supported without the necessity of hardware redesign. A remarkable feature of these processors is their scalability, accommodating intensive workloads up to 864 TOPs and being particularly suited for high-demand applications like automotive safety systems. The integration of ASIL-ready cores allows them to meet stringent automotive safety standards, positioning Chimera GPNPU as an ideal solution for ADAS and other automotive use cases. The architecture's emphasis on reducing memory bandwidth constraints and energy consumption further enhances its suitability for a wide range of high-performance, power-sensitive applications, making it a versatile solution for modern automotive and edge computing.
The xcore.ai platform stands as an economical and high-performance solution for intelligent IoT applications. Designed with a unique multi-threaded micro-architecture, it supports applications requiring deterministic performance with low latency. The architecture features 16 logical cores, split between two multi-threaded processor tiles, which are equipped with 512 kB of SRAM and a vector unit for both integer and floating-point computations. This platform excels in enabling high-speed interprocessor communications, allowing tight integration among processors and across multiple xcore.ai SoCs. The xcore.ai offers scalable performance, adapting the tile clock frequency to meet specific application requirements, which optimizes power consumption. Its ability to handle DSP, AI/ML, and I/O processing within a singular development environment makes it a versatile choice for creating smart, connected products. The adaptability of the xcore.ai extends to various market applications such as voice and audio processing. It supports embedded PHYs for MIPI, USB, and LPDDR control processing, and utilizes FreeRTOS across multiple threads for robust multi-threading performance. On an AI and ML front, the platform includes a 256-bit vector processing unit that supports 8-bit to 32-bit operations, delivering exceptional AI performance with up to 51.2 GMACC/s. All these features are packaged within a development environment that simplifies the integration of multiple application-specific components. This makes xcore.ai an essential platform for developers aiming to leverage intelligent IoT solutions that scale with application needs.
Trion FPGAs by Efinix are engineered to meet the demanding needs of the fast-paced edge computing and IoT markets. These FPGAs feature Efinix's innovative Quantum® compute fabric, providing a compact yet powerful processing platform. Particularly suitable for general-purpose applications, Trion devices cover a range of logic densities to suit various needs, from mobile and IoT to consumer-oriented and industrial applications. Built on a 40 nm process node, Trion FPGAs incorporate critical functionalities such as GPIO, PLLs, MIPI interfaces, and DDR controllers, establishing a versatile base for numerous potential implementations. These features allow developers to address complex compute tasks efficiently, making Trion FPGAs ideal for scenarios where space is at a premium and performance cannot be compromised. Trion FPGAs are designed for development speed and simplicity, supported by their small package sizes and efficient power consumption. This makes them particularly appropriate for handheld devices and application sectors such as med-tech and smart home technology. With ready capabilities for image enhancement, feature extraction, and real-time data processing, Trion FPGAs facilitate the rapid deployment of smart solutions. Besides their technical robustness, Trion devices offer a strategic advantage with their long-term lifecycle support until at least 2045, aligning with the extended production needs typical in industrial fields. This, coupled with their seamless configuration and migration features, sets Trion FPGAs apart as a top choice for integrated and edge applications.
ASRC-Lite is a streamlined audio sample rate converter designed for applications requiring efficient and precise audio data conversion. This versatile solution is engineered to handle multiple audio sample rates, effectively converting audio signals with minimal latency and high sound quality. The ASRC-Lite is ideal for systems where performance and resource efficiency are paramount, embodying Coreworks' commitment to delivering high-quality audio processing capabilities. With a focus on flexibility and integration, the ASRC-Lite can be seamlessly incorporated into a variety of audio applications, ranging from consumer electronics to professional audio equipment. The module is equipped with dynamic features that ensure precise sample rate conversion across different audio formats, supporting optimal performance in real-time environments. As audio systems become increasingly complex, the ASRC-Lite provides a reliable and scalable solution that addresses the evolving needs of audio signal processing. Building on Coreworks' extensive expertise in digital audio processing, the ASRC-Lite exemplifies the marriage of cutting-edge technology and user-oriented design. By offering robust support for low-latency audio conversion, it enables developers to create sophisticated audio solutions that maintain the integrity and clarity of the original sound. This audio sample rate converter is a testament to Coreworks’ innovation in developing functionally advanced yet resource-conscious IP solutions.
The JPEG Codec/CODA/BODA by Chips&Media offers an adept solution for handling JPEG and other legacy video standards, boasting versatile compatibility and adjustable performance settings. This IP solution excels in mobile, digital, and automotive imaging applications, benefiting from Chips&Media's expertise in efficient multimedia processing. With customizable encoding and decoding capabilities, the CODAJ12V variant ensures high-speed operations that maintain image quality even in demanding environments. The CODA/BODA series supports a range of image formats and color depths, allowing seamless integration with diverse media formats. It maintains performance up to 290 megapixels per second at a clock speed of 200 MHz for efficient handling of high-resolution images. The series is equipped with comprehensive features, including multi-view video coding, making it advantageous for 3D and high-definition visual processing in various multimedia contexts. Designed to operate effectively within limited space with reduced power consumption, these codecs incorporate frame buffer compression and offer robust multi-instance processing. The features support real-time media processing demands and are ideal for platforms with stringent resource management requirements. This adaptability ensures the JPEG Codec/CODA/BODA remains a reliable choice for manufacturers looking to embed high-performance image processing capabilities into their products.
The JPEG Encoder for Image Compression offered by section5 is a sophisticated solution for real-time image compression needs, built to meet the Baseline JPEG standards (ITU T.81). Capable of supporting up to 12-bit depth, though defaulting to 8-bit, this encoder is designed for low latency operations, which is particularly beneficial for rolling shutter cameras. Its efficient design requires minimal external resources, essentially an FPGA and Ethernet PHY, to function optimally, thereby reducing power consumption significantly. The encoder is available in two versions: a monochrome or YUV420 pipeline variant, and a more advanced dual-pipe system for higher quality encoding, like YUV422. The architecture of the JPEG Encoder is aligned to support platforms such as Spartan6 and Kintex7, with pixel clocks capable of reaching up to 150 MHz. This design facilitates its application in high-definition streaming, marked by robust compliance with MJPEG (RFC2435), indicating its utility in camera network streaming solutions with minimal frame loss. The extensive verification process ensures adherence to standards and robustness, employing simulations for precise encoding-decoding validation. In terms of customization, users are encouraged to integrate the encoder into their own design setups, offering support for interfacing with various transmission standards like SRTP. Its compatibility with diverse sensors and platforms exemplifies its flexibility and broad applicability. Comprehensive support packages are available to assist in seamless integration, catering to unique customer requirements.
WAVE5 is a mature multi-standard video codec IP designed to meet the demands of high-performance multimedia processing. Supporting AV1, HEVC, AVC, and VP9 decoding, WAVE5 delivers exceptional speed and efficiency, making it suitable for various applications including data centers, surveillance, and set-top boxes. This codec achieves stunning high-resolution performance with 4K and 8K video streams, providing a comprehensive suite of virtualization and encoding tools that maximize resource utility. The WAVE5 architecture is optimized for both power and bandwidth efficiency, thanks to its dual-core setup and state-of-the-art clock gating techniques. It supports extensive pixel depth options and advanced features such as multi-instance support and frame buffer compression. This can considerably reduce latency while simultaneously optimizing image quality across diverse platforms. Applications that require reliable, high-speed video processing benefit greatly from WAVE5’s dependable multi-format compatibility and robust interface options. Equipped with extensive video formatting options and features, WAVE5 allows color format conversions, deep pixel manipulations, and effective data handling functionalities. These features create a seamless operation for developers aiming to integrate high-performing video codec solutions with broad compatibility across modern video standards.
DMP’s ZIA Stereo Vision solution is engineered for depth perception and environmental sensing, leveraging stereo image inputs to compute real-time distance maps. This technology applies stereo matching techniques such as Semi-Global Matching (SGM) to accurately deduce depth from 4K resolution images, paving the way for precision applications in autonomous vehicles and robotic systems. The system employs pre- and post-processing techniques to optimize image alignment and refine depth calculations, achieving high accuracy with low latency. By interfacing through the AMBA AXI4 protocol, it ensures easy integration into existing processing chains, requiring minimal reconfiguration for operation. DMP’s expertise in small footprint, high-performance IP allows the ZIA Stereo Vision to deliver industry-leading depth perception capabilities while maintaining a compact profile, suitable for embedded applications needing robust environmental mapping.
The MIPI DSI-2 Transmitter IP from Arasan Chip Systems caters to the requirement for high-performance display interfaces in mobile and automotive environments. This IP core is designed to support the MIPI DSI standard, facilitating seamless connectivity with high-resolution displays and ensuring optimally bright and vibrant image outputs in devices. Offering a scalable architecture, the DSI-2 Transmitter IP is ideal for integrating with a variety of display panels. Its design ensures low latency and efficient data throughput, benefiting devices that demand high-speed graphical data processing. The IP is also optimized for low power consumption, making it suitable for portable electronics that require extended battery life. The IP's robust support for a variety of video formats makes it an ideal solution for diverse applications ranging from consumer electronics to infotainment systems in vehicles. It further supports advanced capabilities such as video compression and error correction, ensuring consistent and high-quality visual performance.
Polar Encoders/Decoders from Creonic are designed with the latest communication standards in mind, delivering exceptional performance in error correction through polar coding techniques. Originally developed for 5G systems, polar coding offers strong error correction capabilities with high efficiency, making these cores critical for next-generation communication systems. These encoders/decoders provide a consistent performance boost by efficiently utilizing channel capacity, which is particularly beneficial in high-throughput scenarios such as wireless backhaul and cellular networks. Creonic’s implementation focuses on minimizing complexity while maximizing speed, ensuring the cores can handle demanding communication tasks without excessive processing overhead. The Polar Encoders/Decoders IP cores are packed with a rich set of features that include adjustable code rates and length, providing adaptability to various requirements. With comprehensive support for both FPGA and ASIC deployments, they offer a robust, flexible solution for those looking to enhance their existing digital communication frameworks.
Turbo Encoders/Decoders by Creonic represent key components for achieving effective forward error correction in communication systems. Utilizing turbo coding, these IP cores enhance data throughput by rapidly encoding and decoding signals, ensuring minimal error propagation and optimal data integrity. Widely used in standards like DVB-RCS2 and LTE, Turbo coding provides excellent performance gains in error correction. These cores are specifically designed to handle large volumes of data with high efficiency, allowing technologies like 4G and upcoming 5G networks to deliver their promised speeds reliably. Creonic’s Turbo Encoders/Decoders support a range of code rates, making them adaptable for various transmission conditions and enabling dynamic applications across different communication landscapes. Importantly, they incorporate advanced algorithmic techniques to accelerate processing speeds and reduce latency – essential qualities for real-time applications. Supported with a suite of testing environments and simulation models, these IP cores ensure straightforward integration into user hardware, providing considerable flexibility for both FPGA and ASIC implementation scenarios.
The Ultra-High Throughput 8/10/12-bit JPEG Decoder handles high-resolution image streams, ensuring fast decoding while preserving quality. Thanks to its scalable architecture, it supports a range of bit depths and operates efficiently across multiple processing engines, making it suitable for current digital media demands. This decoder is designed to seamlessly integrate into systems, whether it be for consumer electronics or professional broadcasting equipment.
Focusing on fast intra-frame encoding, the Ultra-High Throughput H.264 Encoder excels in compressing single frames independently for applications needing rapid intra-frame processing, such as camera systems or editing software. Its architecture includes adjustable motion estimation algorithms to adapt to content complexity, ensuring efficient yet high-quality video compression, suitable for live video feeds or high-resolution broadcasting.
The SL-400X Mobile TV Integrated Receiver from Saankhya Labs represents a leap in mobile digital television technology. It merges the benefits of compactness with a complete array of features needed for mobile DTV reception. Utilizing advanced software-defined radio technology, the SL-400X ensures seamless reception of digital TV signals across different standards, making it perfect for mobile applications in a rapidly changing broadcasting landscape. Crafted to meet the demands of portable digital TV devices, the SL-400X is designed to provide high-quality reception in diverse geographic locations, whether urban or remote. Its high performance and adaptability ensure that users receive the best possible signal quality in every scenario, a crucial requirement for mobile multimedia consumers. The versatile architecture of the SL-400X allows for easy updates and adaptation to future technologies, safeguarding investments as broadcast standards evolve. Its efficient power consumption, combined with robust processing capabilities, guarantees consistent performance while conserving energy, a vital consideration for mobile and battery-operated devices.
The Ultra-High Throughput 8/10/12-bit JPEG Encoder is designed for maximum speed and efficiency in processing high-definition image data. This encoder allows for real-time performance even with demanding 4K/8K Ultra HD applications. Its architecture leverages parallel processing capabilities that manage image sections independently, optimizing throughput without compromising image integrity. With a focus on scalability, this IP core adapts to various hardware configurations, providing flexibility for both low- and high-end device implementations.
The YouMIPI solution is tailored for seamless integration of MIPI CSI and DSI interfaces. Brite's solution manages sensor data conversion to imagery format, along with configurable noise reduction features to minimize EMI impacts. Compliance with the latest MIPI CSI and DSI standards ensures broad application compatibility, supporting multiple image formats for diverse visualization applications. This comprehensive solution focuses on maintaining data integrity while overcoming typical signal interference challenges in high-speed transmission environments.
The HEVC/H.265 Encoder offers advanced video compression techniques that significantly reduce the file size of high definition and ultra-high definition videos while maintaining superior video quality. This encoder is instrumental for applications where high efficiency and quality are paramount, such as 4K or 8K video transmissions, where efficient bandwidth utilization and storage capabilities are critical. Building on the latest video compression standards, the encoder works to optimize performance and power efficiency, making it suitable for a wide range of devices, from high-end servers to mobile platforms. Its robust architecture ensures that encoding can be executed swiftly without compromising on quality, thus supporting faster streaming and high-resolution video service delivery. The encoder's versatility is further demonstrated by its compatibility with different video delivery systems and adaptive streaming contexts. Whether implemented for live broadcast, video-on-demand services, or multimedia applications, this encoder adheres to industry standards, ensuring interoperability and future-proofing investments made by developers or broadcasters.
The NeuroVoice AI Chip offers a revolutionary solution for voice processing, harnessing neuromorphic frontend technology to provide ultra-low power consumption and superior noise resilience. It is designed for hearables and smart voice-controlled devices, ensuring efficient operation even in high-noise environments. This chip processes audio data on-device, eliminating the need for continuous cloud connectivity while enhancing user privacy. By integrating NASP technology, the NeuroVoice chip excels in voice activity detection, smart voice control, and voice extraction, making it ideal for applications in earbuds, voice access systems, and smart home devices. Its ability to only transmit or recognize human voice while muting background sounds significantly improves command clarity and user interactions, especially in environments prone to irregular noises. The chip is designed to adapt to various audio inputs, providing capabilities for clear communication, enhancing speech intelligibility, and offering features like voice passthrough in hearing aids. With power consumption kept below 150µW, it allows for prolonged device usage and efficient battery management, making it an ideal component for modern voice-activated devices and hearing assistance technologies.
Efinix's Titanium Ti375 FPGA is a high-density device designed for applications demanding low power consumption alongside robust processing capabilities. This FPGA is embedded with the Quantum® compute fabric, an architecture that delivers significant power, performance, and area benefits. Notably, the Ti375 incorporates a hardened quad-core RISC-V block, various high-speed transceivers for protocols like PCIe Gen4, and supports LPDDR4 DRAM for efficient memory operations. The Ti375 excels in its ability to facilitate high-speed communications and sophisticated data processing, owing in part to its multiple full-duplex transceivers. These transceivers support a swath of industries by enabling data rates up to 16 Gbps for PCIe interfaces or up to 10 Gbps for Ethernet links. Additionally, the FPGA is equipped with advanced MIPI D-PHY functionalities, crucial for applications in the fields of imaging and vision. This versatile FPGA supports the development of complex systems, from industrial automation to advanced consumer electronics, by offering features like extensive I/O configurations and on-board debugging capabilities. With the comprehensive Efinity software suite, developers can streamline the transition from RTL design to bitstream generation, enhancing project timelines significantly. Whether used as a standalone solution or integrated into a larger system, the Ti375 provides an adaptable framework for modern design challenges.
The GSV3100 is a robust shader architecture 3D processing unit that supports OpenGL ES 2.0 and 1.1, along with OpenVG 1.1. This powerful IP enables the integration of significant graphical processing within embedded systems, supporting advanced graphics applications such as gaming and interactive interfaces. Its comprehensive features make it suitable for both 3D and advanced vector graphics, delivering high-quality visuals while maintaining energy efficiency, thus catering to a wide array of multimedia applications.
The H.264 Low Power & Low Latency HW Video Decoder from Atria Logic is engineered to fit low-power mobile and industrial contexts. It supports H.264 Baseline Profile decoding, targeting a wide range of applications including in-car infotainment, industrial robotics control, and mobile device media playback. Supporting decoding resolutions up to 1080p30, this decoder is designed for low-latency performance, a necessity for real-time video applications. Implemented using a clock-gated, multi-domain design, it ensures power-efficient operation, ideal for battery-powered or cost-sensitive environments. Additional features such as support for error resilient operations and advanced decoding techniques make it exceptionally flexible and robust. The IP’s architecture is heavily optimized to facilitate high performance on modest power budgets, thereby extending the capabilities of mobile and embedded systems seeking advanced video processing functionalities.
Creonic's LDPC Encoders/Decoders are designed to provide high-efficiency error correction for modern communication systems. These IP cores follow advanced LDPC (Low-Density Parity-Check) coding schemes to offer a balance of performance and flexibility. They are suitable for use in a plethora of standards such as DVB-S2, DVB-S2X, 5G, and CCSDS, ensuring robust data transmission across various signal conditions. The LDPC solutions by Creonic are known for their high throughput, making them fit for applications that demand speed and accuracy. Their capability to process and correct errors efficiently ensures data integrity, especially in bandwidth-critical systems. Users can expect comprehensive integration support with available design kits and simulation models that aid seamless incorporation within existing hardware platforms. With flexibility for both FPGA and ASIC implementations, Creonic's LDPC encoders and decoders come equipped with adaptive features that allow for various code rates and block lengths. This adaptability ensures that users can tailor the application to meet specific requirements, benefiting from the cores' proven reliability in delivering high-quality data communication.
This Baseline Profile H.264 Encoder is optimized for low-complexity video applications, offering moderate compression rates suitable for video conferencing, streaming, and mobile applications. Specifically structured to operate efficiently on more straightforward hardware setups, it ensures an adequate quality-to-performance ratio for everyday use. This encoder incorporates essential features like frame prediction and variable rate control to maintain consistent output.
Designed for the cutting-edge world of 8K broadcasting, this Multi-Codec solves the complexity of managing high-definition video content. The codec combines H.264/AVC and H.265/HEVC technologies to offer unmatched compression efficiency and image quality, especially with its 422 color sampling and 12-bit depth. This multi-codec is engineered to address the growing demands of ultra-high-definition content creation and transmission, beneficial for industries like media production, broadcasting, and professional video editing. The product supports high compression ratios, crucial for managing vast video data without degrading the video quality. This powerful codec not only elevates processing speed but also reduces bandwidth usage, representing a significant leap in visual fidelity for evolving media platforms. With 8K resolution support, it's designed to cater to the next generation of digital content, pushing the envelope in video clarity and detail.
Designed for advanced media professionals, the High Profiles H.264 Encoder supports complex chroma formats and intense video data rates. Ideal for resolutions up to 4K, it integrates thoroughly into professional editing and broadcast workflows. For environments requiring the utmost in visual fidelity, this encoder provides advanced motion estimation and adaptive quantization, underpinning unprecedented video clarity.
The Hyperspectral Imaging System from IMEC offers an advanced portable solution for comprehensive spectral analysis. By employing cutting-edge sensor technology combined with powerful optics, it captures a broad spectrum of light. This system is instrumental in industries ranging from agriculture to healthcare. It provides precise imaging capabilities, enabling users to confidently conduct critical assessments such as plant health monitoring, mineral detection, or even advanced medical diagnostics. Hyperspectral technology bridges the gap between large-scale economic efficiency and intricate analysis, paving the way for new applications across fields by offering unprecedented spectral resolution.
The IP Camera Front End by Bitec is specifically optimized for Altera CMOS sensor technology, providing a comprehensive parameterized design that enhances video signal processing, especially for high-resolution camera applications. This IP is critical in industries that rely on accurate image data capture, including security surveillance, industrial inspection, and scientific imaging.\n\nThis tailored solution supports the integration of complex video analytics, ensuring rapid data throughput and minimal latency in video processing. Its ability to handle large data volumes with precision and accuracy is a testament to its robust engineering design. Users benefit from this system's configuration flexibility, which allows customization according to specific application demands, whether in high-speed environments or scenarios demanding detailed image analysis.\n\nEngineered with adaptability in mind, the IP core supports a wide array of video outputs, maintaining compatibility with both legacy and emerging video standards. This ensures that manufacturers can easily implement the core into their systems, maintaining a significant edge in the competitive field of multimedia technology.
ISPido is an advanced and fully RTL-configurable Image Signal Processing pipeline, which can be customized through the AXI4-LITE protocol, such as with RISCV processors. The pipeline includes components like defective pixel correction, color filter array interpolation using the Malvar-Cutler algorithm, and auto-white balance. Additionally, it supports complex operations like statistics collection and the implementation of 3x3 convolution filters for enhanced video analyses.\n\nISPido is designed to handle inputs with varying bit depths (8, 10, or 12 bits) and resolutions as high as 7680x7680, including a standard 4K2K at 30fps. Its architecture adheres strictly to the AMBA AXI4 standards, ensuring complete configurability and adaptability to diverse system requirements. This makes ISPido incredibly versatile, whether deployed for small-scale, low-power devices, or expansive 8K resolution applications.\n\nThe imaging pipeline incorporates a wide range of video processing techniques, such as RGB to YCbCr color space conversion and HDR support, all while maintaining a minimal footprint on the hardware. Its flexibility allows it to be tailored for various use cases, ensuring optimal performance across different platforms.
Targeting more robust applications, the Main Profile H.264 Encoder supports higher complexity scenarios and richer media experiences. With enhanced compression features, it serves mid-range applications such as standard video streaming or digital broadcasting. The encoder is engineered to process 4:2:0 and 4:2:2 chroma formats with outstanding efficiency, adaptable to various digital platforms and storage solutions.