All IPs > Interface Controller & PHY > USB > Stream Buffer Controller for Memory Mapped DMA
The Stream Buffer Controller is designed for AMD and Intel FPGAs, acting as a bridge between stream and memory-mapped DMA with support for up to 16 independent streams. It facilitates data buffering in an external memory with up to 4 GB capacity, providing versatile FIFO-like capability. Each stream operates through configurable memory, utilizing AMBA AXI4-Stream interfaces for streamlined communication between embedded CPUs, FPGAs, or controllers.
| Class | Value |
|---|---|
| Categories |
Interface Controller & PHY > USB Memory & Logic Library > Embedded Memories |
| Availability | All Countries & Regions |
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