The RV32IC_P5 Processor Core by IQonIC Works caters to medium-scale embedded applications that require robust performance. Featuring a five-stage pipeline design, it supports complex instruction sets ideal for diverse application coding requirements, including both trusted firmware and user applications. This core utilizes the RISC-V RV32I instruction set and supports the 'A', 'M', and optional 'N' extensions for atomic operations and integer arithmetic.
To optimize code execution, the RV32IC_P5 core incorporates features like branch prediction with configurable branch target buffer and return address stack. It supports machine-mode and user-mode privileged architectures with the option for memory protection management for secure application execution. The core aims to deliver high performance with low latency and reduced branching delays.
This processor is adaptable for both ASIC and FPGA projects and includes AHB-Lite interfaces, enabling flexible memory management and I/O mapping. Its design is bolstered by a suite of development tools, including a robust virtual prototyping framework that facilitates integration and testing in diverse development environments.
