The RV32EC_P2 Processor Core by IQonIC Works is engineered for small, low-power embedded applications, emphasizing dependable performance with its two-stage pipeline architecture. Compliant with the RISC-V RV32E base instruction set and User-Level ISA V2.2, it incorporates RVC compressed instructions for reduced code size. Optional 'M' standard extensions support integer multiplication and division, enhancing computational capabilities.
This processor core is adaptable to both ASIC and FPGA design flows. It offers a simple machine-mode architecture with memory direct addressing, supporting 20 interrupts along with software and timer interrupts. Its clock-gating feature aids in reducing power consumption during idle states. Additionally, it supports tightly-coupled memory interfaces compatible with ASIC ROM and SRAM or FPGA block memories.
The RV32EC_P2 core also integrates AHB-Lite or APB interfaces for expanded memory and I/O functionalities. Developers can utilize a diverse range of tools, including the GNU toolchain and the Eclipse IDE, for firmware development. This core is optimized for rapid implementation in trust-critical, embedded environments.
