The RISC-V Platform-Level Interrupt Controller (PLIC) IP provided by IQonIC Works is an essential component for managing interrupts across systems with many sources and targets. This IP is highly configurable, allowing designers to adjust the number of interrupt sources and targets to fit specific application needs while maintaining compatibility with the RISC-V PLIC specifications.
This interrupt controller supports wide-ranging interrupt sensitivity options, synchronous or asynchronous signal configurations, and various edge or level sensitivities. The flexible architecture easily integrates into systems through an AHB-Lite interface, handling priority setting, enabling interrupts, and managing the complete lifecycle of interrupt requests.
IQonIC Works PLIC IP is designed to accommodate both single and multi-processor environments, efficiently controlling and delegating interrupts across multiple operation contexts. The PLIC offers secure interrupt handling and allocation, ensuring reliable performance in both machine and user-mode contexts, essential for applications with stringent mission-critical performance requirements.
