The pPOR01 is a power-on reset macrocell designed to ensure reliable operation of power-sensitive circuits by providing a stable reset signal on power-up and power-down cycles. This reset circuit is essential in maintaining proper function across various supply range fluctuations.
Specifically architected for use in 1.2-V cores, this macrocell optimizes its reset thresholds to ensure logical accuracy under varying conditions. The pPOR01 incorporates a standard CMOS output, with a footprint suitable for integration either within a standard pad cell or as a standalone design within other systems.
The pPOR01 offers users a reliable reset function, combined with features such as a minimal quiescent current draw and standardized deliverables including integration guidelines, SPICE models, and functional test benches. Its power-on timing ensures that logic cells will operate correctly regardless of supply noise, making it a fundamental part of SoCs requiring robust power management strategies.