The pPLL08 Family is a set of all digital fractional-N RF frequency synthesizer PLLs, specifically designed for RF applications like 5G and WiFi. These PLLs are notable for their exceptionally low jitter and compact area, enabling optimal performance in high-frequency environments up to 8GHz.
Employing a second-generation digital PLL architecture, the pPLL08 family features a LC tank oscillator to achieve industry-leading phase noise performance while maintaining low power consumption below 15mW. Its design ensures minimal interference from other chip components, crucial for supporting high SNDR in RF systems. This makes it particularly suitable for use as a local oscillator or for clocking ADCs/DACs with stringent SNR requirements.
Available in multiple technologies, including prominent foundries like Samsung and TSMC, the pPLL08 family boasts flexibility and integration simplicity, complete with models and views essential for backend flows. Additionally, Perceptia offers customization and technical support to adapt this PLL to various deployment scenarios, ensuring that it fits perfectly within its intended application environment.
