The pPLL03F-GF22FDX is part of Perceptia's second-generation all-digital PLLs, tailored for high-stakes clocking needs in performance computing applications. Designed for clocking solutions with critical timing demands, this PLL provides fractional multiplication up to 4GHz with exceptionally low jitter.
Its architecture allows the pPLL03F to fit in compact areas, under 0.01 sq mm, while maintaining power consumption below 5mW. Such attributes make it a prime candidate for SoCs with extensive clock domains, where each domain might be individually driven by a PLL. The design includes built-in regulation, enabling shared power supplies between the PLL and its associated blocks, simplifying integration.
pPLL03F incorporates dual PLL outputs from separate postscalers, programmable up to a factor of 2,040, and offers enhanced testability through standard ATPG vectors. Its versatile application potential spans high-speed digital processing and moderate-SNR ADC/DAC setups, further enriched by Perceptia's support services for customization and migration.
