The pPLL02F Family is engineered for general-purpose applications, delivering all-digital Fractional-N PLL capabilities. Ideal for moderate-speed digital systems and microprocessors, this family supports frequencies up to 2GHz. Its architecture ensures low-jitter performance (<18ps RMS), minimal power consumption (<3.5mW), and a compact footprint (<0.01 sq mm), making it suitable for diverse clocking demands.
The second-generation digital PLL architecture offers integer and fractional multiplication, enabling an output frequency up to 400 times the input reference. It provides two additional PLL outputs through programmable post-scalers. Engineered for high testability, the pPLL02F Family includes ATPG vectors and supports industry-standard flows for seamless integration into SoC designs.
This PLL is available across various foundries, including GlobalFoundries, Samsung, TSMC, and UMC. The versatile PLL is designed to deliver consistent performance across different processes, making it a robust choice for systems requiring integrated power supply regulation and multi-domain clock systems.
