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All IPs > Analog & Mixed Signal > Clock Synthesizer > pPLL02F Family

pPLL02F Family

From Perceptia

Description

The pPLL02F family is designed as a versatile all-digital Fractional-N PLL, primarily aimed at general-purpose applications requiring precise clocking. Its architecture supports fractional multiplication with frequencies up to 2GHz, proving essential for moderate-speed digital systems and microprocessors. The pPLL02F delivers low jitter performance of less than 18ps RMS, making it suitable for systems with multiple PLLs, aimed at moderate speed integration.

This second-generation technology maintains a compact form factor, occupying less than 0.01 square millimeters, and operating with low power consumption, underlining its efficiency for integration in complex SoCs. With the ability to handle input frequencies ranging from 5MHz to 500MHz, the pPLL02F proves its adaptability across varied designs. It also features a robust design with lock-detect outputs, further enriching its applications.

Availability spans across GlobalFoundries 22FDX, Samsung 8LPP, and TSMC N6/N7, among others, showcasing Perceptia's ability to support numerous foundry options and process nodes. Designers benefit from the comprehensive integration support provided to ensure implementation is seamless across different technology platforms.

Features
  • Low jitter, suitable for many clocking applications
  • Small die area
  • Fractional multiplication with high flexibility
Foundries & Process Nodes
Foundry Process Nodes
GLOBALFOUNDARIES 22nm
Samsung 28nm SLP
TSMC 32nm
UMC 55nm
Tech Specs
Class Value
Categories Analog & Mixed Signal > Clock Synthesizer
Analog & Mixed Signal > PLL
Jitter < 18ps RMS
Size < 0.01 sq mm
Power < 3.5mW
Power (W) <3.5W
Availability All Countries & Regions
Applications
  • Moderate speed digital systems
  • Microprocessors
  • General-purpose PLL
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