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All IPs > Wireline Communication > Error Correction/Detection > ntVIT Configurable Viterbi FEC System

ntVIT Configurable Viterbi FEC System

From Noesis Technologies P.C.

Description

Convolutional FEC codes are very popular because of their powerful error correction capability and are especially suited for correcting random errors. The most effective decoding method for these codes is the soft decision Viterbi algorithm. ntVIT core is a high performance, fully configurable convolutional FEC core, comprised of a 1/N convolutional encoder, a variable code rate puncturer/depuncturer and a soft input Viterbi decoder. Depending on the application, the core can be configured for specific code parameters requirements. The highly configurable architecture makes it ideal for a wide range of applications. The convolutional encoder maps 1 input bit to N encoded bits, to generate a rate 1/N encoded bitstream. A puncturer can be optionally used to derive higher code rates from the 1/N mother code rate. On the encoder side, the puncturer deletes certain number of bits in the encoded data stream according to a user defined puncturing pattern which indicates the deleting bit positions. On the decoder side, the depuncturer inserts a-priori-known data at the positions and flags to the Viterbi decoder these bits positions as erasures. The Viterbi decoder uses a maximum-likelihood detection recursive process to cor-rect errors in the data stream. The Viterbi input data stream can be composed of hard or soft bits. Soft decision achieves a 2 to 3dB in-crease in coding gain over hard-decision decoding. Data can be received continuously or with gaps.

Deliverables
Soft IP
  • Compliance
  • Synthesizable RTL
  • Verilog integration testbench
  • Sample synthesis script and constraints
  • Sample simulation script
  • Datasheet
  • Hardware user guide
  • Hardware implementation guide
  • Standard EDA tool flow scripts and support files
  • Verification test bench and test vectors
  • Technical support
Features
  • Fully configurable, high throughput convolutional FEC system based on Viterbi Decoder algorithm.
  • Supports different convolutional coding standards.
  • Parameterizable constraint length, code rate, generator coefficients and soft bits.
  • Parameterizable puncturing for full code rate control.
  • Programmable traceback depth.
  • Supports zero terminating and tail biting Viterbi de-coding algorithm.
  • Soft or hard decision decoding.
  • Supports both continuous and burst input data flow.
  • Supports both block and continuous based decoding.
  • Fixed Viterbi decoder latency.
  • Single or multiple symbol rate clock.
  • Continuous decoding with no gaps between codewords.
  • Predictable decoder latency.
  • Area efficient design.
  • Fully synchronous design, using single clock.
  • Silicon proven in ASIC and FPGA technologies for a variety of applications.
Foundries & Process Nodes
Foundry Process Nodes
All Foundries All Process Nodes
Tech Specs
Image Gallery
ntVIT Configurable Viterbi FEC System ntVIT Configurable Viterbi FEC System
Applications
  • 3G Wireless Base Stations.
  • xDSL(ADSL,VDSL,HDSL,SDSL).
  • WiMAX (IEEE 802.16e).
  • Wireless LAN (IEEE 802.11).
  • Wireless PAN (IEEE 802.15.3a).
  • Cable Modems.
  • Satellite Communications.
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