The Network Protocol Accelerator Platform (NPAP) is a high-performance solution that accelerates TCP/UDP/IP protocols within FPGA- and ASIC-based systems. Developed alongside the Fraunhofer Heinrich-Hertz-Institute, this platform offers customizable high-bandwidth and low-latency communication capabilities essential for Ethernet links ranging from 1G to 100G. It's designed for various hardware applications, providing turnkey solutions and integrates synthesizable HDL codes capable of being implemented directly into FPGAs.
At its core, NPAP enhances CPU performance by handling TCP/UDP/IP processing within programmable logic, thereby boosting network throughput while minimizing latency. The platform's modular architecture supports full line-rate processing up to 70 Gbps in FPGAs and over 100 Gbps in ASICs. It features bi-directional data paths supporting multiple, parallel TCP engines designed for scalable network processing.
Its utility extends to FPGA-based SmartNICs, networked storage such as iSCSI, and even high-speed video transmissions. The NPAP can be evaluated via a Remote Evaluation System, allowing potential users to conduct a hands-on assessment through a remote connection to MLE's lab, providing flexibility and saving integration time.
