Overview:
The MIPI CSI-2 (Camera Serial Interface) Transmitter IP establishes an interface between a peripheral device (camera) and host processor (application engine) for mobile applications. It offers the mobile industry a standard, robust, scalable, low-power, high-speed, and cost-effective interface that caters to a wide range of imaging solutions for mobile devices.
Key Features:
Compliance with MIPI-CSI-2 version 3.0
Compliance with C-PHY 2.0 for MIPI CSI-2 Version 3.0
Compliance with D-PHY 2.5 for MIPI CSI-2 Version 3.0
Compatibility with I2C and I3C (SDR, DDR) for CCI interface
Pixel to Byte conversion support from Application layer to LLP layer
Continuous clock behavior in clock lane for D-PHY physical layer
De-skew sequence pattern in Data Lane Module
Lane Distribution Function for distributing packet bytes across N-Lanes
Sync word insertion through PPI command in C-PHY physical layer
Insertion of Filler bytes in LLP layer for packet footer alignment
Setting specific bits in packet header
Defining frame blanking period
Seed selection in scrambler and de-scrambler by Sync word
Support for C-PHY/D-PHY/A-PHY/M-PHY with one PHY layer configuration
Target Applications:
Imaging
Surveillance
Gaming
Sensor devices
Internet of Things (IoT)
Wearable devices
Virtual Reality
Augmented Reality
Automotive Systems
