All IPs > Processor > DSP Core
In the realm of semiconductor IP, DSP Cores play a pivotal role in enabling efficient digital signal processing capabilities across a wide range of applications. Short for Digital Signal Processor Cores, these semiconductor IPs are engineered to handle complex mathematical calculations swiftly and accurately, making them ideal for integration into devices requiring intensive signal processing tasks.
DSP Core semiconductor IPs are widely implemented in industries like telecommunications, where they are crucial for modulating and encoding signals in mobile phones and other communication devices. They empower these devices to perform multiple operations simultaneously, including compressing audio, optimizing bandwidth usage, and enhancing data packets for better transmission quality. Additionally, in consumer electronics, DSP Cores are fundamental in audio and video equipment, improving the clarity and quality of sound and visuals users experience.
Moreover, DSP Cores are a linchpin in the design of advanced automotive systems and industrial equipment. In automotive applications, they assist in radar and lidar systems, crucial for autonomous driving features by processing the data needed for real-time environmental assessment. In industrial settings, DSP Cores amplify the performance of control systems by providing precise feedback loops and enhancing overall process automation and efficiency.
Silicon Hub's category for DSP Core semiconductor IPs includes a comprehensive collection of advanced designs tailored to various processing needs. These IPs are designed to integrate seamlessly into a multitude of hardware architectures, offering designers and engineers the flexibility and performance necessary to push the boundaries of technology in their respective fields. Whether for enhancing consumer experiences or driving innovation in industrial and automotive sectors, our DSP Core IPs bring unparalleled processing power to the forefront of digital innovations.
The Origin E8 NPU by Expedera is engineered for the most demanding AI deployments such as automotive systems and data centers. Capable of delivering up to 128 TOPS per core and scalable to PetaOps with multiple cores, the E8 stands out for its high performance and efficient processing. Expedera's packet-based architecture allows for parallel execution across varying layers, optimizing resource utilization, and minimizing latency, even under strenuous conditions. The E8 handles complex AI models, including large language models (LLMs) and standard machine learning frameworks, without requiring significant hardware-specific changes. Its support extends to 8K resolutions and beyond, ensuring coverage for advanced visualization and high-resolution tasks. With its low deterministic latency and minimized DRAM bandwidth needs, the Origin E8 is especially suitable for high-performance, real-time applications. The high-speed processing and flexible deployment benefits make the Origin E8 a compelling choice for companies seeking robust and scalable AI infrastructure. Through customized architecture, it efficiently addresses the power, performance, and area considerations vital for next-generation AI technologies.
The Chimera GPNPU is a general-purpose neural processing unit designed to address key challenges faced by system on chip (SoC) developers when deploying machine learning (ML) inference solutions. It boasts a unified processor architecture capable of executing matrix, vector, and scalar operations within a single pipeline. This architecture integrates the functions of a neural processing unit (NPU), digital signal processor (DSP), and other processors, which significantly simplifies code development and hardware integration. The Chimera GPNPU can manage various ML networks, including classical frameworks, vision transformers, and large language models, all within a single processor framework. Its flexibility allows developers to optimize performance across different applications, from mobile devices to automotive systems. The GPNPU family is fully synthesizable, making it adaptable to a range of performance requirements and process technologies, ensuring long-term viability and adaptability to changing ML workloads. The Cortex's sophisticated design includes a hybrid Von Neumann and 2D SIMD matrix architecture, predictive power management, and sophisticated memory optimization techniques, including an L2 cache. These features help reduce power usage and enhance performance by enabling the processor to efficiently handle complex neural network computations and DSP algorithms. By merging the best qualities of NPUs and DSPs, the Chimera GPNPU establishes a new benchmark for performance in AI processing.
Standing at the pinnacle of eSi-RISC's processor cores, the eSi-3264 offers a powerful 32/64-bit architecture with DSP extensions designed for intensive computing tasks. Its unique ability to process both SIMD fixed and floating-point operations makes it ideal for advanced applications requiring complex digital signal processing with minimal hardware footprint. The eSi-3264 excels in applications needing DSP capabilities due to its fully pipelined MAC unit and the support for dual and quad 64-bit accumulations. The architecture supports a wide range of application-specific instructions and enhanced memory management via configurable caches and an optional MMU. Leveraging industry-standard interfaces, it allows seamless integration with existing chip architectures. These capabilities, coupled with high code density and efficient power management strategies, reinforce its suitability for next-generation multimedia, signal processing, and control systems looking to maximize performance and minimize power consumption.
The NaviSoC is a cutting-edge system-on-chip (SoC) that integrates a GNSS receiver and an application processor on one silicon die. Known for its high precision and reliability, it provides users with a compact and energy-efficient solution for various applications. Capable of supporting all GNSS bands and constellations, it offers fast time-to-first-fix, centimeter-level accuracy, and maintains high sensitivity even in challenging environments. The NaviSoC's flexible design allows it to be customized to meet specific user requirements, making it suitable for a wide range of applications, from location-based services to asset tracking and smart agriculture. The incorporation of a RISC-V application microcontroller, along with an array of peripherals and interfaces, introduces expanded functionality, optimizing it for advanced IoT and industrial applications. Engineered for power efficiency, the NaviSoC supports a range of supply voltages, ensuring low power consumption across its operations. The chip's design provides for efficient integration into existing systems with the support of a comprehensive SDK and IDE, allowing developers to tailor solutions to their precise needs in embedded systems and navigation infrastructures.
xcore.ai is a versatile platform specifically crafted for the intelligent IoT market. It hosts a unique architecture with multi-threading and multi-core capabilities, ensuring low latency and high deterministic performance in embedded AI applications. Each xcore.ai chip contains 16 logical cores organized in two multi-threaded processor 'tiles' equipped with 512kB of SRAM and a vector unit for enhanced computation, enabling both integer and floating-point operations. The design accommodates extensive communication infrastructure within and across xcore.ai systems, providing scalability for complex deployments. Integrated with embedded PHYs for MIPI, USB, and LPDDR, xcore.ai is capable of handling a diverse range of application-specific interfaces. Leveraging its flexibility in software-defined I/O, xcore.ai offers robust support for AI, DSP, and control processing tasks, making it an ideal choice for enhancing IoT device functionalities. With its support for FreeRTOS, C/C++ development environment, and capability for deterministic processing, xcore.ai guarantees precision in performance. This allows developers to partition xcore.ai threads optimally for handling I/O, control, DSP, and AI/ML tasks, aligning perfectly with the specific demands of various applications. Additionally, the platform's power optimization through scalable tile clock frequency adjustment ensures cost-effective and energy-efficient IoT solutions.
Expedera's Origin E6 NPU is crafted to enhance AI processing capabilities in cutting-edge devices such as smartphones, AR/VR headsets, and automotive systems. It offers scalable performance from 16 to 32 TOPS, adaptable to various power and performance needs. The E6 leverages Expedera's packet-based architecture, known for its highly efficient execution of AI tasks, enabling parallel processing across multiple workloads. This results in better resource management and higher performance predictability. Focusing on both traditional and new AI networks, Origin E6 supports large language models as well as complex data processing tasks without requiring additional hardware optimizations. Its comprehensive software stack, based on TVM, simplifies the integration of trained models into practical applications, providing seamless support for mainstream frameworks and quantization options. Origin E6's deployment reflects meticulous engineering, optimizing memory usage and processing latency for optimal functionality. It is designed to tackle challenging AI applications in a variety of demanding environments, ensuring consistent high-performance outputs and maintaining superior energy efficiency for next-generation technologies.
The Origin E2 from Expedera is engineered to perform AI inference with a balanced approach, excelling under power and area constraints. This IP is strategically designed for devices ranging from smartphones to edge nodes, providing up to 20 TOPS performance. It features a packet-based architecture that enables parallel execution across layers, improving resource utilization and performance consistency. The engine supports a wide variety of neural networks, including transformers and custom networks, ensuring compatibility with the latest AI advancements. Origin E2 caters to high-resolution video and audio processing up to 4K, and is renowned for its low latency and enhanced performance. Its efficient structure keeps power consumption down, helping devices run demanding AI tasks more effectively than with conventional NPUs. This architecture ensures a sustainable reduction in the dark silicon effect while maintaining high operating efficiencies and accuracy thanks to its TVM-based software support. Deployed successfully in numerous smart devices, the Origin E2 guarantees power efficiency sustained at 18 TOPS/W. Its ability to deliver exceptional quality across diverse applications makes it a preferred choice for manufacturers seeking robust, energy-conscious solutions.
ISPido on VIP Board is a specialized runtime solution designed for optimal performance with Lattice Semiconductors’ Video Interface Platform. It features versatile configurations aimed at real-time image optimization, allowing users to choose between automatic best-setting selection or manual adjustments via menu-driven interfaces for precise gaming control. Compatible with two Sony IMX 214 image sensors, this setup ensures superior image clarity. The HDMI VIP Output Bridge Board and sophisticated calibration menus via serial ports offer further adaptability, accommodating unique project requirements effortlessly. This versatility, combined with efficient HDMI 1920 x 1080p output utilizing YCrCb 4:2:2, ensures that image quality remains consistently high. ISPido’s modular design ensures seamless integration and easy calibration, facilitating custom user preferences through real-time menu interfaces. Whether choosing gamma tables, applying varied filters, or selecting other personalization options, ISPido on VIP Board provides robust support tailored to electronic visualization devices.
The xT CDx is a sophisticated tumor profiling solution designed to advance precision oncology care for solid malignancies. This assay uses next-generation sequencing to assess alterations in 648 genes, identifying single nucleotide variants, multi-nucleotide variants, and insertions/deletions. It also evaluates microsatellite instability status and serves as a companion diagnostic to explore potential treatment avenues according to specific therapeutic product labeling. Uniquely, xT CDx offers mutation profiling through samplings from both formalin-fixed paraffin-embedded tumor tissues and matched normal samples such as blood or saliva, enhancing diagnostic clarity and treatment direction for patients with solid tumors. The comprehensive report generated includes valuable insights that can inform the personalized treatment path for cancer patients.
ISPido is a sophisticated Image Signal Processing Pipeline designed for comprehensive image enhancement tasks. It is ultra-configurable using the AXI4-LITE protocol, supporting integration with processors like RISCV. The ISP Pipeline accommodates procedures such as defective pixel correction, color interpolation using the Malvar-Cutler algorithm, and various statistical adjustments to facilitate adaptive control. Furthermore, ISPido incorporates comprehensive color conversion functionalities, with support for HDR processing and chroma resampling to 4:2:2/4:2:0 formats. Supporting bit depths of 8, 10, or 12 bits, and resolutions up to 7680x7680, ISPido ensures high-resolution output crucial for next-generation image processing needs. This flexibility positions it perfectly for projects ranging from low power devices to ultra-high-definition vision systems. Each component of ISPido aligns with AMBA AXI4 standards, ensuring broad compatibility and modular customization possibilities. Such features make it an ideal choice for heterogeneous electronics ecosystems involving CPUs, GPUs, and specialized processors, further solidifying its practicality for widespread deployment.
The Spiking Neural Processor T1 is an innovative ultra-low power microcontroller designed for always-on sensing applications, bringing intelligence directly to the sensor edge. This processor utilizes the processing power of spiking neural networks, combined with a nimble RISC-V processor core, to form a singular chip solution. Its design supports next-generation AI and signal processing capabilities, all while operating within a very narrow power envelope, crucial for battery-powered and latency-sensitive devices. This microcontroller's architecture supports advanced on-chip signal processing capabilities that include both Spiking Neural Networks (SNNs) and Deep Neural Networks (DNNs). These processing capabilities enable rapid pattern recognition and data processing similar to how the human brain functions. Notably, it operates efficiently under sub-milliwatt power consumption and offers fast response times, making it an ideal choice for devices such as wearables and other portable electronics that require continuous operation without significant energy draw. The T1 is also equipped with diverse interface options, such as QSPI, I2C, UART, JTAG, GPIO, and a front-end ADC, contained within a compact 2.16mm x 3mm, 35-pin WLCSP package. The device boosts applications by enabling them to execute with incredible efficiency and minimal power, allowing for direct connection and interaction with multiple sensor types, including audio and image sensors, radar, and inertial units for comprehensive data analysis and interaction.
The SCR4 Microcontroller Core stands out with its ability to perform floating-point arithmetic, ideal for high-performance, low-power applications. This 32/64-bit RISC-V core integrates a floating-point unit alongside a 5-stage in-order pipeline, supporting atomic operations and optional single and double precision floating-point instructions. Such capabilities make it suitable for applications requiring enhanced mathematical computations, such as sensor hubs and mobile devices.\n\nEquipped with L1 and L2 caches, an MPU unit, and multicore processing capabilities, the SCR4 offers significant improvements in processing efficiency, facilitating real-time execution of various operating systems. Its compatibility with standard interfaces, coupled with sophisticated branch prediction and error-protection features, underscores its versatility across multiple embedded applications.\n\nIndustries such as industrial automation, the IoT, automotive, and smart sensors are prime benefactors of the SCR4's optimized capabilities. Its superior design supports smart home devices and mobile technologies, blending performance and power management into a compact, area-efficient package.
The SCR3 Microcontroller Core is an efficient RISC-V processor tailored for embedded applications that demand high performance in power-sensitive environments. This 32/64-bit microcontroller-class core features a sophisticated 5-stage in-order pipeline with support for atomic instructions, compressed extensions, and integer multiplication and division. The design is enriched with a dynamic branch predictor and supports up to 4-core symmetric multiprocessing for improved performance and memory coherency.\n\nThe SCR3's memory architecture includes tightly coupled memory (TCM) with error correction features, L1/L2 caches, and a configurable memory protection unit that supports various privilege modes. A robust interrupt system is facilitated by industry-standard interfaces such as AHB, AXI4, and JTAG, making it a powerhouse for real-time operating systems and heterogeneous cluster integration.\n\nApplications of the SCR3 core expand into industrial automation, IoT, smart meters, and storage devices. The processor's optimization for energy efficiency, small area, and high performance addresses the unique requirements of these fields, ensuring smooth operation of automation systems, smart home applications, and automotive systems.
The Universal DSP Library is an adaptable collection of digital signal processing components, seamlessly integrated into the AMD Vivado ML Design Suite. This library supports a variety of common DSP tasks, including filtering, mixing, and approximations, all while providing the integral logic necessary for connecting DSP systems. By minimizing development time and enabling rapid assembly of signal processing chains, the library facilitates both rapid prototyping and sophisticated design within FPGA environments. It provides raw VHDL source code and IP blocks, paired with comprehensive documentation and bit-true software models for preliminary evaluation and development. Supporting a multitude of processing types such as continuous wave and pulse processing, the library delivers significant flexibility for developers. This ranges from real and complex signal processing to accommodating multiple independent data channels. All components are designed to operate within the standardized AXI4-Stream protocol, ensuring an easy integration process with other systems. The inclusion of out-of-the-box solutions for FIR, CIC filters, and CORDIC highlights the library's capability to cover repetitive DSP tasks, allowing developers to concentrate on more project-specific challenges. The Universal DSP Library not only streamlines design with its modularity and ease of use, but it also offers solutions for optimizing performance across different application areas. Its utility spans digital signal processing, communication systems, and even medical diagnostics, underscoring its versatility and essential role in modern FPGA-based development initiatives.
The Digital Radio (GDR) from GIRD Systems is an advanced software-defined radio (SDR) platform that offers extensive flexibility and adaptability. It is characterized by its multi-channel capabilities and high-speed signal processing resources, allowing it to meet a diverse range of system requirements. Built on a core single board module, this radio can be configured for both embedded and standalone operations, supporting a wide frequency range. The GDR can operate with either one or two independent transceivers, with options for full or half duplex configurations. It supports single channel setups as well as multiple-input multiple-output (MIMO) configurations, providing significant adaptability in communication scenarios. This flexibility makes it an ideal choice for systems that require rapid reconfiguration or scalability. Known for its robust construction, the GDR is designed to address challenging signal processing needs in congested environments, making it suitable for a variety of applications. Whether used in defense, communications, or electronic warfare, the GDR's ability to seamlessly switch configurations ensures it meets the evolving demands of modern communications technology.
The Domain-Specific RISC-V Cores from Bluespec are engineered to facilitate hardware acceleration in a streamlined and efficient manner. By packaging accelerators as software threads, these cores deliver high concurrency and efficient system performance. The scalability embedded in this technology caters to a range of application needs, enabling systematic hardware acceleration for developers and organizations aiming to optimize RISC-V implementations.
The iCan PicoPop® System on Module (SOM) by Oxytronic is an ultra-compact computing solution designed for high-performance and space-constrained environments within the aerospace industry. Utilizing the Xilinx Zynq UltraScale+ MPSoC, this module delivers significant processing power ideal for complex signal processing and other demanding tasks. This module's design caters to embedded system applications, offering robust capabilities in avionics where size, weight, and power efficiency are critical considerations. It provides core functionalities that support advanced video processing, making it a pivotal component for those requiring cutting-edge technological support in minimal form factors. Oxytronic ensures that the iCan PicoPop® maintains compatibility with a wide range of peripherals, facilitating easy integration into existing systems. Its architectural innovation signifies Oxytronic's understanding of aviation challenges, providing solutions that are both technically superior and practically beneficial for modern aerospace applications.
The Cottonpicken DSP Engine is a versatile digital signal processing solution focused on image processing tasks such as Bayer pattern decoding and various matrix operations. Capable of decoding Bayer patterns into formats like YUV 4:2:2, YUV 4:2:0, and RGB, it offers programmable delays and supports YCrCb and YCoCg colorspaces. The engine is designed to handle 3x3 and 5x5 kernel filters and specific matrix operations. This DSP core operates at the full data clock, supporting pixel frequencies up to 150 MHz, depending on the platform. This capability makes it a robust choice for high-throughput applications requiring real-time image processing capabilities. The Cottonpicken DSP Engine is offered as a closed-source netlist object, part of a comprehensive development package tailored for high-performance tasks. Its efficient architecture allows seamless integration into custom designs, particularly for applications that require intense computational tasks and high-speed signal processing.
The Nerve IIoT Platform by TTTech Industrial Automation is a sophisticated edge computing solution that bridges the gap between industrial environments and digital business models. Designed for machine builders, it supports real-time data exchange, offering a robust infrastructure that connects physical machines directly with IT systems. The platform optimizes machine performance by allowing for remote management and software deployment. Nerve's architecture is highly modular, making it adaptable to specific industrial needs. It features cloud-managed services that enable seamless application deployments across multiple devices, straight from the cloud or on-premises infrastructure. By supporting various hardware, from simple gateways to industrial PCs, the platform is scalable and capable of growing with business demands. Security is a pivotal aspect of Nerve, offering both IEC 62443 certification for safe deployment and regular penetration tests to ensure integrity and protection. Its integration capabilities with protocols like OPC UA, MQTT, and others allow for enhanced data collection and real-time analytics, promoting efficiency and reducing operational costs through predictive maintenance and system optimization.
The Trifecta-GPU is a sophisticated family of COTS PXIe/CPCIe GPU Modules by RADX Technologies, designed for substantial computational acceleration and ease of use in PXIe/CPCIe platforms. Powered by the NVIDIA RTX A2000 Embedded GPU, it boasts up to 8.3 FP32 TFLOPS performance, becoming a preferred choice for modular Test & Measurement (T&M) and Electronic Warfare (EW) systems. It integrates seamlessly into systems, supporting MATLAB, Python, and C/C++ programming, making it versatile for signal processing, machine learning, and deep learning inference applications. A highlight of the Trifecta-GPU is its remarkable computing prowess coupled with its design that fits within power and thermal constraints of legacy and modern chassis. It is available in both single and dual-slot variants, with the capability to dissipate power effectively, allowing users to conduct fast signal analysis and execute machine learning algorithms directly where data is acquired within the system. With its peak performance setting new standards for cost-effective compute acceleration, the Trifecta-GPU also supports advanced computing frameworks, ensuring compatibility with a myriad of applications and enhancing signal classification and geolocation tasks. Its hardware capabilities are complemented by extensive software interoperability, supporting both Windows and Linux environments, further cementing its position as a top-tier solution for demanding applications.
Satellite Navigation SoC Integration by GNSS Sensor Ltd represents an advanced solution for incorporating satellite navigation capabilities into system-on-chip designs. This product integrates various global navigation satellite systems (GNSS) such as GPS, GLONASS, SBAS, and Galileo, ensuring comprehensive coverage and accuracy. The design is supported on ASIC evaluation boards that showcase its ability to work as a standalone receiver and tracker. This enables not only verification of GNSS quality but also supports its function as a universal SPARC V8 development platform. Additionally, its compact format ensures easy integration into existing systems, making it versatile for different applications. Technical features of this solution also include specific ASIC CPU functionalities like the LEON3 SPARC V8 processor compliant with 32-bit architecture and a clock speed of 100MHz. It includes memory management, high-speed AMBA bus connections, and debugging features, emphasizing robustness and performance. GNSS functionalities are extensive, comprising multiple I/Q ADC inputs and channels across various systems, ensuring rapid signal acquisition and processing. These abilities make it effective for fast signal detection and positioning accuracy. The engineering behind Satellite Navigation SoC Integration also provides sophisticated features like dual mode power supply, UART connectivity, and multiple antenna inputs, ensuring seamless data transmission and reception. Designed for simplicity and efficiency, it accommodates further hardware extensions and custom configurations, allowing users to tailor the solution to their specific needs. This turnkey solution leverages efficient power and memory management strategies to provide steady and reliable performance across diverse environments.
Tensix Neo by Tenstorrent stands as a sophisticated processor designed to cater to intricate AI computations. Known for its superior handling of large-scale machine learning tasks, Tensix Neo prioritizes both performance and efficiency. The Tensix Neo processor provides a flexible platform for developers needing high computational power for AI algorithms. It handles multiple data types and supports a variety of machine learning models, delivering high precision and speed for inference and training sessions. Its architecture is optimized for parallel computing, facilitating concurrent data processing that accelerates workflow activities. Alongside exceptional memory bandwidth, the Tensix Neo ensures that data-intensive tasks do not overwhelm system resources, maintaining a balanced load across operations. This processor is ideal for various applications in deep learning and AI analysis, offering capabilities that go beyond the basics to push boundaries in AI research. Its adaptability makes it suitable for integration in different computing environments, from data centers to cloud-based platforms, demonstrating Tenstorrent's commitment to versatile, next-gen tech solutions.
The TSP1 Neural Network Accelerator from Applied Brain Research is a cutting-edge AI solution built to handle complex AI workloads with remarkable efficiency. Designed specifically for battery-powered devices, this chip excels in low-power operations while processing extensive neural network tasks. At its core, the TSP1 integrates state-of-the-art processing capabilities tailored for time series data, essential for applications like natural voice interfaces and bio-signal classification. This innovative chip is notable for its energy efficiency, consuming less than 10mW for complex AI tasks, making it an ideal solution for energy-conscious applications. Furthermore, it supports an array of sensor signal applications, ensuring versatile functionality across different domains including AR/VR, smart home automation, and medical wearables. By incorporating the Legendre Memory Unit, a proprietary advanced state-space neural network model, the TSP1 achieves superior data efficiency compared to traditional network architectures. ABR’s TSP1 stands out for its ability to perform powerful AI inferences with low latency, essential for real-time applications. It supports a wide range of interfaces, making it suitable for diverse integration scenarios, from voice recognition to industrial automation. Additionally, the chip's optimized hardware is key for algorithm scaling, facilitating smooth processing of larger neural models without compromising speed or performance.
The Catalyst-GPU series by RADX Technologies brings advanced graphics and computational acceleration to PXIe/CPCIe platforms, leveraging NVIDIA’s robust technology to extend capabilities within modular Test & Measurement and Electronic Warfare applications. These GPUs sport significant computational power, delivering up to 2.5 FP32 TFLOPs with NVIDIA Quadro T600 and T1000 models. Distinguished by their ease of use, Catalyst-GPUs support MATLAB, Python, and C/C++ programming, alongside a plethora of computing frameworks, enabling efficient signal processing, machine learning, and deep learning applications. This makes them an excellent fit for signal classification and geolocation, as well as semiconductor and PCB testing. Catalyst-GPUs’ unique capabilities lie in their ability to process large FFTs in real-time, elevating signal processing precision significantly. Their integration into PXIe systems allows users to conduct faster, more accurate data analyses right where data is acquired. With support for both Windows and Linux environments, Catalyst-GPUs are crafted for versatility and effectiveness across a wide range of technical requirements.
TUNGA emerges as a revolutionary multi-core SoC integrating RISC-V cores with posit arithmetic capabilities. This solution is specifically architected for enhancing high-performance computing (HPC) and artificial intelligence workloads by leveraging the advantages of posit data types. As data centers struggle with the limitations of traditional number formats, TUNGA offers improved accuracy and efficiency, transforming real-number calculations with its innovative RISC-V foundation. This cutting-edge SoC includes the QUIRE accumulator, adept at executing precise dot products, crucial for delivering high-accuracy computations across extensive datasets. TUNGA's design incorporates reconfigurable FPGA gates, offering adaptability in critical function accelerations tailored for datacenter tasks. This adaptability extends to managing unique data types, thereby expediting AI training and inference. TUNGA stands out for its capability to streamline applications such as cryptography and AI support functions, making it a vital tool in pushing data center technologies to new horizons.
The VibroSense AI Chip is a cutting-edge solution designed for vibration analysis in Industrial IoT applications. It is based on the Neuromorphic Analog Signal Processor, which preprocesses raw sensor data, significantly reducing the amount of data to be stored and transmitted. This chip is particularly beneficial in predictive maintenance applications, where it helps in the early detection of potential machinery failures by analyzing vibrations generated by industrial equipment. VibroSense excels in overcoming the traditional challenges linked to data processing for condition monitoring systems. By performing data preprocessing at the sensor level, it minimizes data volumes by a thousand times or more, making it feasible to conduct condition monitoring over narrow-bandwidth communications and at lower operational costs. This ensures industrial operations can identify issues like bearing wear or imbalance effectively, ultimately extending equipment life and improving safety. The implementation of VibroSense's neural network architecture enables it to handle complex vibration signals with high accuracy. It supports energy-efficient designs, providing a compelling solution for industries aiming to optimize maintenance operations without increasing their OPEX. Its ease of integration with standard sensor nodes and support for energy harvesting applications further enhances its market appeal.
The Prodigy Universal Processor by Tachyum is a groundbreaking innovation in the field of computer processors, widely recognized as the world's first universal processor. It is adept at handling a broad spectrum of applications including high-performance computing, AI development, and deep machine learning. Prodigy stands out by integrating the capabilities of CPUs, GPGPUs, and TPUs into a cohesive architecture. This integration allows for extraordinary computational power at reduced energy consumption and enhanced server utilization. One of the key features of the Prodigy series is its ability to outperform conventional industry processors with up to 18 times better performance and 6 times greater efficiency per watt. The processor architecture manages to combine general-purpose computing with high-performance workloads seamlessly, simplifying the programming and deployment process for a myriad of applications. The Prodigy range is designed to handle the complexities of today's technological demands. With 256 high-performance cores supported by DDR5 memory controllers and PCIe 5.0 lanes, it positions itself as an exemplary solution for scenarios requiring extensive data handling like cloud computing, data analytics, and large-scale databases. Its emulation systems allow for smooth transitions from existing architectures, making it a versatile choice for engineers and developers.
Advanced Silicon's Specialty Microcontrollers are architecturally innovative RISC-V based solutions tailored for high-performance applications like image processing. Encompassing cutting-edge co-processing units, these microcontrollers redefine potential in embedded system functionalities. The controllers integrate both performance and practicality, enabling sophisticated algorithms crucial for modern image processing tasks. They come embedded with touch firmware featuring machine learning algorithms that handle user input recognition, enhancing interactive user interfaces. This positions Advanced Silicon at the forefront of the industry, propelling user-friendly and intuitive technology solutions. Their SOC Touch Controllers are structured on a 32-bit RISC architecture, featuring integrated capacitive AFE interfaces, power management units, and robust communication interfaces, suited for smaller touch screens ranging between 10 to 27 inches. For larger screens, up to 84 inches, their multi-chip solutions combine advanced 32-bit DSP architecture with powerful capacitive sensing AFEs, offering comprehensive performance for interactive applications.
The TimeServo System Timer is an advanced IP core designed to provide high-resolution timekeeping for FPGAs. With its sub-nanosecond resolution and sub-microsecond accuracy, it is particularly suited for applications like packet timestamping, which demands precise time measurement. The core's PI-DPLL allows it to synchronize its operations using an external Pulse Per Second (PPS) signal. One of the key features of TimeServo is its ability to handle multiple independent clock domains, offering flexibility with up to 32 runtime-switchable outputs. This capability makes it a versatile solution for applications requiring different timing formats, including binary, IEEE ordinary, and IEEE transparent modes. The internal logical 120-bit phase accumulator and a digital phase-locked loop ensure that timekeeping operations are conducted with the utmost precision. Engineered for seamless integration, the timer’s capabilities can be further extended with the TimeServoPTP solution, providing a complete IEEE-1588v2/PTP ordinary slave device. This makes the TimeServo System Timer a comprehensive tool for network time synchronization tasks in FPGA contexts.
The NoISA Processor revolutionizes traditional processor design by eliminating the constraints of a fixed instruction set architecture (ISA). It employs an advanced microcoded algorithmic state machine, known as the Hotstate machine, which is programmable using a subset of C, providing users with unparalleled flexibility and efficiency. This processor is particularly well-suited for environments where minimizing energy consumption is crucial, such as in edge computing and IoT devices, where it can outperform softcore CPUs in terms of speed and area efficiency. By enabling real-time alteration of microcode, the NoISA Processor allows for dynamic modifications in its operation without the need to alter the FPGA itself, thereby offering a truly customizable hardware solution. The unique advantage of the NoISA Processor lies in its ability to load powerful microcode, circumventing traditional processor limitations imposed by fixed ISAs, which can restrict performance and adaptability. Its implementation is favored in applications requiring rapid deployment of small, programmable state machines, making it an ideal choice for controlling complex systolic arrays. By harnessing its capability to reprogram without hardware changes, developers are offered a flexible tool capable of achieving the ultimate in performance and functionality. Designed for those seeking enhanced performance without the burdens of an ISA, the NoISA Processor provides a platform for innovation, enabling projects that require sophisticated control and high efficiency. Its utilization of the Hotstate machine, programmed through a simplified subset of C, empowers users with the tools necessary for achieving precise control and optimization in diverse computing landscapes, from IoT controllers to extensive processing tasks.
The Vector Unit from Semidynamics is an extensively configurable RISC-V processing component designed to handle multiple types of arithmetic and logic operations across various data types. Fully customizable for performance to specific application needs, it supports an adjustable data and vector path length, allowing for seamless integration into diverse processing environments. This unit is compatible with the RISC-V Vector 1.0 Specification and supports integer and floating-point operations across data widths from 8 to 64 bits and beyond. With a scalable design, the Vector Unit enables configuration of the vector core count and corresponding data path widths, catering to a variety of power-performance-area trade-off scenarios. The machine can integrate with up to 32 vector cores, enabling wide adoption across different segments of computing, from AI to standard processing tasks. Designed to interface efficiently with other Semidynamics technologies, such as the Tensor Unit, and equipped with the Gazzillion Misses™ for data flow optimization, this unit is fortified for advanced AI requirements and general-purpose processing tasks. Moreover, its seamless deployment within Linux environments underscores its flexibility and ease of integration into existing systems.
The Ceva-XC22 is a cutting-edge DSP core tailored for 5G and 5G-Advanced workloads, offering unprecedented processing capabilities and flexibility for demanding communications applications. This DSP core supports simultaneous processing tasks with high utilization rates, ensuring superior performance across multiple data channels and spectral layers.\n\nCeva-XC22 is built on a dual-threaded architecture with a dynamic scheduled vector processor, which provides extensive processing power for increasingly complex 5G applications. The system also includes a vector computation unit for enhanced arithmetic operations and data handling.\n\nBy leveraging its advanced execution model, Ceva-XC22 delivers significant performance improvements over its predecessors, making it ideal for a range of infrastructure applications, from massive MIMO to core network processing.
Codasip's L-Series DSP Core is engineered to deliver high-efficiency digital signal processing capabilities within a RISC-V framework. This core is tailored for applications requiring intensive signal processing tasks, offering a suite of tools to craft unique instructions and architectures. The L-Series provides robust support for complex algorithms often found in audio and video processing, communications, and sensor data analysis. By allowing extensive customization of both hardware and software interfaces, the L-Series stands as a versatile option for designers looking to optimize their systems for specific DSP tasks. The core’s design ensures that users can achieve high throughput and low power consumption, making it especially suitable for embedded and real-time applications.
The Ceva-SensPro2 is an advanced Vision AI DSP designed to concurrently manage tasks such as vision processing, RADAR/LiDAR computation, and AI inferencing within a single integrated architecture. This DSP family caters to high-performance demands in automotive, robotics, and smart devices, by combining scalar processing with vector capabilities to handle complex sensor data streams efficiently.\n\nThe architecture of Ceva-SensPro2 is designed for flexibility, offering a range of configuration options tailored to specific application needs, from compact wearables to large-scale automotive deployments. By employing an 8-way VLIW architecture, this DSP ensures both efficiency and speed in processing multi-dimensional data.\n\nComplementing its hardware, Ceva-SensPro2 is supported by a comprehensive suite of software tools, which include AI development environments and a rich set of libraries for computer vision and sensor processing, enabling rapid deployment and adaptation to evolving industry standards.
Menta's Adaptive Digital Signal Processor combines the prowess of adaptability with efficient processing capabilities specifically designed for stringent signal processing tasks. Incorporating reconfigurable DSP blocks within the FPGA fabric leads to tailored solutions, perfectly aligned with the demands of intricate applications in telecommunications and automotive sectors. These processors bolster performance, offering real-time computational abilities and elevated processing speed, suiting operations that require precise, adaptable, and dynamic calculations. With a strong emphasis on flexibility, the processor scales efficiently, addressing varying computational load, which is crucial for different market segments. Menta ensures that these processors meet rigorous industry standards, providing robust solutions with simplified integration into diverse system architectures.
The Prodigy FPGA-Based Emulator by Tachyum serves as a comprehensive evaluation platform for developers looking to assess, test, and enhance software applications on the Prodigy processor architecture. As an emulation platform, it offers detailed insights into performance metrics and serves as a critical tool for debugging and compatibility verification. Capable of emulating eight processor cores on a single FPGA board, this system includes vector and matrix processing units for robust data handling, further illustrating Tachyum's focus on creating versatile and effective solutions for data-heavy applications. The FPGA platform, structured with multiple FPGA and I/O boards connected via cables, provides a realistic simulation of actual processor environments, offering precise performance measurement capabilities. Developer tools and libraries are also integrated into the emulator, facilitating application development across various programming languages and environments. It is particularly beneficial for those transitioning to the Prodigy architecture, as it provides pre-built systems that support a range of key applications and utilities. This makes it a preferred platform for real-world workload simulation and helps in ensuring software compatibility across diverse operational environments.
The RFicient chip serves as a groundbreaking solution in the realm of IoT applications, offering a considerable reduction in power consumption—up to 99%. This substantial energy efficiency is accomplished without compromising performance, making it ideal for the rapidly growing Internet of Things sector. Developed by Fraunhofer IIS, this chip enhances sustainable practices within IoT by enabling devices to operate effectively on minimal energy input, thereby prolonging device battery life and supporting greener technological advancements. The technology supporting RFicient lies in its capability to utilize wireless RF harvesting. The chip can operate in environments where traditional energy sources are limited or unavailable, making it incredibly versatile for remote or difficult-to-access locations. Moreover, its energy harvesting abilities allow it to collect and convert wireless signals into usable power, creating new possibilities for IoT networks by cutting reliance on battery replacements or frequent charging. Aimed particularly at IoT systems that require low power and extended battery life, RFicient truly represents a leap forward in both environmental sustainability and technological efficiency. Industries such as smart metering, industrial automation, and remote sensing could benefit significantly from integrating RFicient chips into their operations, ensuring seamless performance while advocating for eco-friendly initiatives.
TicoRAW provides an innovative approach to managing raw imaging data, prioritizing efficiency and quality in sensor data processing. This solution is particularly adapted for high-resolution image capture systems, ensuring minimal latency while maintaining image integrity. It is crafted to support high-bandwidth, high-resolution lines, effectively reducing the processing demands on supporting hardware. Integrating TicoRAW into your systems means leveraging a codec that preserves the fullest detail in raw image data, suitable for both professional and consumer-grade cameras. This ensures that users can benefit from the richness of the raw sensor data, with all the nuanced quality intact, while significantly lowering the data bandwidth required. The technology minimizes power consumption, which is crucial for mobile and embedded applications. Known for its adaptability, TicoRAW can handle advanced image processing tasks, executing everything from the capturing phase to real-time data analysis, recording, and streaming. Its flexibility allows it to interface with a range of imaging sensors and is perfect for fast-paced, high-resolution environments such as medical imaging, satellite surveillance, broadcast, and beyond. By simplifying the interfacing with camera systems, TicoRAW represents the next step in efficient video data handling, facilitating improved image processing pipelines and sensor applications.
The DSP Cores from Wasiela include advanced CORDIC engines and iterative FFT options that cater to a range of digital signal processing needs. With support for various FFT sizes and types, these cores are critical in handling complex operations like decimation, enabling efficient processing for 3GPP LTE, WiMax, and other standards.
The Electrical PAM-X DSP is a state-of-the-art signal processor dedicated to enhancing copper connectivity. By pushing the boundaries of existing technologies, this processor is designed to maximize signal integrity over extended copper distances. Its primary application involves Active Electrical Cable (AEC) chips, where it plays an essential role in delivering high-speed data transmission with superior signal quality. This DSP technology is pivotal in empowering next-generation data center applications by facilitating robust and reliable connectivity solutions.
The N-channel Multiplexed Finite Impulse Response (FIR) Filter by Zipcores is tailored for digital signal processing applications requiring efficient filtering across multiple channels. This IP core allows for numerous input channels to be multiplexed through a single filter architecture, enhancing resource utilization and reducing hardware complexity. Unlike traditional FIR filter designs which utilize separate filters for each channel, this multiplexed approach significantly reduces implementation size, making it cost-effective without compromising on performance. It is particularly beneficial for applications that handle complex-valued input, such as I/Q data in communications, where dual-channel inputs are common. The multiplexed FIR filter is highly configurable, permitting adjustments in filter specifications to align with specific project requirements. It offers a modular design that simplifies integration into existing systems and platforms, enabling seamless incorporation into broad-ranging digital signal processes. Consequently, engineers get the advantage of reduced design cycles and development costs while maintaining high throughput and minimal latency.
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