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All IPs > Processor > CPU > HES-DVM

HES-DVM

From Aldec, Inc.

Description

HES-DVM is a dynamic and comprehensive verification platform that offers hybrid verification and validation solutions for complex SoC and ASIC designs. Capable of handling designs with up to 633 million gates, this tool elevates simulation with bit-level simulation acceleration and virtual modeling features, ensuring a seamless transition from design to deployment.

By incorporating the latest advancements in co-emulation technology, HES-DVM provides robust support for transaction level emulation via the SCE-MI 2.1 standard, facilitating seamless interaction between hardware prototypes and simulation environments. This emulation and prototyping capability is crucial for identifying and addressing design challenges early in the product lifecycle.

Additionally, HES-DVM integrates effectively with existing verification workflows, supporting both SCE-MI-based verification methodologies and efficient SoC partitioning methods. Its ability to leverage cloud-based infrastructures via its cloud edition further enhances the flexibility and scalability needed for modern semiconductor projects.

Tech Specs
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