The EMSA5-FS is a RISC-V based processor core designed with functional safety in mind, making it ideal for applications needing ISO 26262 ASIL-D certification. Equipped with an optional L0 instruction cache, this processor features a five-stage pipeline which offers high reliability through a design that supports fail-safe operations, such as Dual Modular Redundancy (DMR) and Error Correcting Code (ECC). Its robust architecture allows it to exceed frequencies of 1GHz, making it capable in high-performance environments.
