The Menta eFPGA IP Cores v5 are designed to be highly versatile, high-density programmable logic blocks embedded within SoCs or ASICs. These cores help designers define precise resource requirements to meet application-specific needs, available in both Soft RTL and Hard GDSII options. The key advantages of these cores include significant cost reduction, improved performance, and lower power consumption compared to traditional on-board FPGAs.
One of the main features of Menta's eFPGA is its architecture, which conserves board space and drastically reduces power usage, as much as 50% less than comparable FPGA-based solutions. Integration directly on-chip reduces I/O latency and overcomes the limitations of traditional chip-to-chip communication interfaces. Additionally, Menta's eFPGA supports a broad range of technology nodes, from 350nm to less than 5nm, offering unparalleled silicon process portability.
Menta's eFPGA architecture is easy to integrate, verified at various stages including formal verification and system simulation. It features trusted controls over bitstream loading and offers customization options for logic blocks, DSP arithmetic functions, and power-saving features. The standard-cell designed eFPGAs cater to unique application needs while being platform adaptive, ensuring broad compatibility and design flexibility.
