All IPs > Security IP > Cryptography Cores
In today's interconnected world, the importance of secure communication and data protection cannot be overstated. Cryptography cores are a crucial subset of semiconductor IPs designed to provide foundational security solutions across a variety of electronic systems. At their core, these IPs implement complex algorithms that ensure the confidentiality, integrity, and authenticity of data being processed and exchanged.
The cryptography cores available in this category offer a diverse range of features tailored to different security needs. From symmetric-key algorithms like AES to asymmetric-key systems such as RSA and ECC, these cores ensure that systems can securely encrypt and decrypt information, protecting it from unauthorized access and tampering. By embedding these cryptographic functions directly into hardware, it becomes possible to achieve faster processing speeds and higher levels of security compared to software implementations.
These semiconductor IPs are widely used in applications where data security is paramount. This includes, but is not limited to, industries such as finance, telecommunications, and healthcare. Devices utilizing cryptography cores can range from secure payment systems, ensuring safe financial transactions, to mobile devices for secure communications, to medical devices that safeguard sensitive health information. Additionally, with the rise of the Internet of Things (IoT), cryptography cores are increasingly crucial in providing secure connections for a myriad of smart devices.
By integrating cryptography cores into your designs, you not only improve security but also future-proof your products against many potential vulnerabilities. As security threats continue to evolve, having robust cryptography solutions is essential for maintaining trust and reliability in your products and services. Whether you're developing a new application or enhancing an existing one, our category of cryptography cores offers the semiconductor IP solutions you need to meet today's stringent security demands.
Overview: Cybersecurity IPs offer a range of essential security features to protect your digital assets and sensitive information. From True Random Number Generators (TRNG) to advanced encryption algorithms like AES, DES, 3DES, and cryptographic hash functions like SHA, as well as RSA for secure key exchange and digital signatures, the IPs provide a comprehensive suite of tools to safeguard your data. Key Features: True Random Number Generator (TRNG): Generates unpredictable and unbiased random numbers for cryptographic applications. Advanced Encryption Standard (AES): Provides robust encryption with symmetric key algorithms for securing data. Data Encryption Standard (DES) and Triple DES (3DES): Implement legacy encryption algorithms for data protection. Hash Functions: Includes secure cryptographic hash functions like SHA (Secure Hash Algorithm) for data integrity verification. RSA: Enables secure key exchange, encryption, and digital signatures for secure communication. These cybersecurity IPs are designed to meet the stringent security requirements of modern applications, ensuring the confidentiality, integrity, and authenticity of your data.
Post-Quantum Cryptography Processing Engine Adds support for lattice-based cryptographic operations such as ML-KEM and ML-DSA. PQPlatform-Lattice provides post-quantum support for these NIST-standardized algorithms with minimal area, and leverages an existing SHA-3 accelerator, powered by PQShield-supplied firmware. It’s designed for minimal area, and maximum compatibility, and is deployed with optional firmware-backed side-channel resistance.
PUFrt represents PUFsecurity's Hardware Root of Trust solution, delivering essential security functionalities like TRNG, UID, and Secure OTP, all within a robust anti-tamper framework. As the cornerstone of their security offerings, PUFrt is designed to remain tamper-resistant, ensuring that keys and sensitive data stay on the chip, thus binding system integrity to hardware-level security. Utilizing a 1024-bit PUF-based identification, along with the entropic power of a true random number generator, PUFrt creates an unyielding security foundation for varied applications, from simple hardware keys to complex security coprocessors. This technology protects against malicious reverse engineering and counterfeiting, while also offering customization options to fit diverse system requirements, enhancing the security value across industries. Feature-rich and versatile, PUFrt easily integrates into diverse architectures, allowing for its use in a broad array of applications. By partnering with leading chip designers and foundries, PUFsecurity ensures that PUFrt not only meets current security needs but is also prepared to handle future challenges, making it a pivotal component for companies aiming to maintain a secure digital environment.
The NaviSoC is a cutting-edge system-on-chip (SoC) that integrates a GNSS receiver and an application processor on one silicon die. Known for its high precision and reliability, it provides users with a compact and energy-efficient solution for various applications. Capable of supporting all GNSS bands and constellations, it offers fast time-to-first-fix, centimeter-level accuracy, and maintains high sensitivity even in challenging environments. The NaviSoC's flexible design allows it to be customized to meet specific user requirements, making it suitable for a wide range of applications, from location-based services to asset tracking and smart agriculture. The incorporation of a RISC-V application microcontroller, along with an array of peripherals and interfaces, introduces expanded functionality, optimizing it for advanced IoT and industrial applications. Engineered for power efficiency, the NaviSoC supports a range of supply voltages, ensuring low power consumption across its operations. The chip's design provides for efficient integration into existing systems with the support of a comprehensive SDK and IDE, allowing developers to tailor solutions to their precise needs in embedded systems and navigation infrastructures.
SphinX is a high-performance AES-XTS encryption and decryption solution known for low latency and uncompromised security. Designed with independent non-blocking channels for encryption and decryption, this product offers robust data protection in real-time applications. Ideal for environments where security and efficiency are critical, SphinX ensures data privacy without affecting system speed.
The Polar ID Biometric Security System is Metalenz's revolutionary solution for face authentication, delivering a new level of biometric security through advanced polarization imaging. Unlike conventional facial recognition systems, Polar ID captures the unique 'polarization signature' of each human face, offering enhanced security by effortlessly differentiating between real faces and potential spoofing attempts with sophisticated 3D masks. This innovative use of meta-optics not only enhances security but also reduces the need for complex optical modules traditionally required in consumer devices. Polar ID stands out in its ability to operate efficiently under varied lighting conditions, from bright sunlight to complete darkness. It achieves this with more than 10 times the resolution of current structured light systems, ensuring reliable and secure facial recognition performance even when users wear glasses or face coverings. By operating in the near-infrared spectrum, Polar ID extends its utility to scenarios previously challenging for facial recognition technology, thus broadening its application range. Designed for mass-market deployment, Polar ID minimizes the footprint and complexity of face unlock systems. By doing away with bulky modules, it offers a compact and cost-effective alternative while maintaining high-security standards. This innovation enables widespread adoption in consumer electronics, allowing a seamless integration into smartphones, tablets, and other mobile devices, potentially replacing less secure biometric methods like fingerprint recognition.
eSi-Crypto offers a comprehensive suite of encryption and authentication intellectual property tailored for ASIC and FPGA applications. With low resource utilization and high throughput, the package includes True Random Number Generators (TRNGs), adhering to NIST 800-22 standards, available only as hard macros in target technologies. The IP cores can operate independently or interface through AMBA APB/AHB or AXI buses, supporting encryption algorithms such as CRYSTALS Kyber, ECC, RSA, and AES. By focusing on security, eSi-Crypto helps safeguard communications and data integrity, essential in today's digital landscape. The IP suite notably features advanced cryptographic algorithms, ensuring modern applications remain secured against evolving threats.
The HDCP Encryption-Decryption Engine developed by Trilinear Technologies is designed to protect digital audio and video content from unauthorized access during transmission. It aligns with the HDCP 2.2 standard, ensuring that all data exchanged between a display source and receiver remains secure and resistant to interception. This solution is vital for industries where content protection is paramount, such as in premium consumer electronics, professional audiovisual setups, and sensitive government or military communication channels. This engine supports the authentication protocols necessary for protected transactions over DisplayPort interfaces, using sophisticated AUX channels to seal data transfer securely. It is engineered to reduce the processing load by offloading encryption tasks from the system processor, thereby enhancing the overall system performance while maintaining robust security. Capable of integrating into a range of devices from set-top boxes to large multimedia systems, the HDCP Encryption-Decryption Engine offers developers a trustworthy method to shield content from piracy and unauthorized dissemination. Its implementation ensures that content providers can operate freely with the assurance that their digital rights are upheld across all endpoints.
The Secure OTP (One-Time Programmable) solution by PUFsecurity elevates standard OTP technology by integrating anti-fuse memory and robust encryption techniques, ensuring the high-level protection of sensitive data. This sophisticated approach allows for secure data storage and management, even under duress from advanced attack methodologies. Secure OTP transforms how critical data like encryption keys and configuration states are stored, enabling devices to maintain data integrity during storage and transit. By encapsulating both physical macro implementations and digital RTL designs with intuitive control, Secure OTP allows seamless integration into a host of applications while safeguarding against unauthorized data extraction. The integration of diverse interface protocols makes Secure OTP adaptable to a wide range of industrial requirements. It stands as a robust defensive measure in the face of modern threats, offering reliability in an era where secure data storage solutions are more important than ever.
The DAES processor is an ultra-secure cryptographic co-processor that efficiently implements the Rijndael encryption algorithm. This processor provides robust support for both 128 and 256-bit key lengths, while also facilitating a variety of block cipher modes such as ECB, CBC, and other standards. It incorporates an internal key expansion module to guarantee prompt and secure data encryption processes, positioning it as a vital asset for environments where data confidentiality is paramount. By integrating smoothly via APB, AHB, and AXI bus interfaces, it adapts seamlessly across differing systems requiring top-tier security.
aiWare stands out as a premier hardware IP for high-performance neural processing, tailored for complex automotive AI applications. By offering exceptional efficiency and scalability, aiWare empowers automotive systems to harness the full power of neural networks across a wide variety of functions, from Advanced Driver Assistance Systems (ADAS) to fully autonomous driving platforms. It boasts an innovative architecture optimized for both performance and energy efficiency, making it capable of handling the rigorous demands of next-generation AI workloads. The aiWare hardware features an NPU designed to achieve up to 256 Effective Tera Operations Per Second (TOPS), delivering high performance at significantly lower power. This is made possible through a thoughtfully engineered dataflow and memory architecture that minimizes the need for external memory bandwidth, thus enhancing processing speed and reducing energy consumption. The design ensures that aiWare can operate efficiently across a broad range of conditions, maintaining its edge in both small and large-scale applications. A key advantage of aiWare is its compatibility with aiMotive's aiDrive software, facilitating seamless integration and optimizing neural network configurations for automotive production environments. aiWare's development emphasizes strong support for AI algorithms, ensuring robust performance in diverse applications, from edge processing in sensor nodes to high central computational capacity. This makes aiWare a critical component in deploying advanced, scalable automotive AI solutions, designed specifically to meet the safety and performance standards required in modern vehicles.
DolphinWare IPs is a versatile portfolio of intellectual property solutions that enable efficient SoC design. This collection includes various control logic components such as FIFO, arbiter, and arithmetic components like math operators and converters. In addition, the logic components span counters, registers, and multiplexers, providing essential functionalities for diverse industrial applications. The IPs in this lineup are meticulously designed to ensure data integrity, supported by robust verification IPs for AXI4, APB, SD4.0, and more. This comprehensive suite meets the stringent demands of modern electronic designs, facilitating seamless integration into existing design paradigms. Beyond their broad functionality, DolphinWare’s offerings are fundamental to applications requiring specific control logic and data integrity solutions, making them indispensable for enterprises looking to modernize or expand their product offerings while ensuring compliance with industry standards.
The Dynamic Neural Accelerator II (DNA-II) is an advanced IP core that elevates neural processing capabilities for edge AI applications. It is adaptable to various systems, exhibiting remarkable efficiency through its runtime reconfigurable interconnects, which aid in managing both transformer and convolutional neural networks. Designed for scalability, DNA-II supports numerous applications ranging from 1k MACs to extensive SoC implementations. DNA-II's architecture enables optimal parallelism by dynamically managing data paths between compute units, ensuring minimized on-chip memory bandwidth and maximizing operational efficiency. Paired with the MERA software stack, it provides seamless integration and optimization of neural network tasks, significantly enhancing computation ordering and resource distribution. Its applicability extends across various industry demands, massively increasing the operational efficiency of AI tasks at the edge. DNA-II, the pivotal force in the SAKURA-II Accelerator, brings innovative processing strength in compact formats, driving forward the development of edge-based generative AI and other demanding applications.
Akida IP is BrainChip's pioneering neuromorphic processor, crafted to mimic the human brain's analytic capabilities by processing only essential sensor inputs. This localized processing greatly enhances efficiency and privacy, as it significantly reduces the need for cloud data transactions. The processor offers scalable architecture supporting up to 256 nodes interconnected via a mesh network with each node composed of four configurable Neural Network Layer Engines. This event-based technology cuts down operations drastically compared to traditional methods, promoting lower power consumption. With robust support for on-chip learning and incremental learning capabilities, Akida IP is apt for a diverse range of applications and environments. The neural network processor adapts to real-time data seamlessly, creating new avenues for personalized and private on-device AI experiences. The architecture of Akida IP allows it to run complete neural networks, managing various neural network functions in hardware, thus optimizing resource utilization and power efficiency. Integrating Akida IP into systems is straightforward with BrainChip's development ecosystem, facilitating easy evaluation, design, and deployment processes. The Akida PCIe board and additional platform offerings, like the Raspberry Pi kit, promote seamless development and integration for intelligent AI endpoints, perfectly aligning with BrainChip's mission to streamline the implementation of edge AI solutions.
The AES Key Wrap Core developed by IP Cores, Inc. implements the NIST-approved AES Key Wrap specification, ensuring secure key exchange and management. Utilizing both 128-bit and 256-bit AES keys for wrapping and unwrapping operations, this core fortifies the security infrastructure for communication and encryption-based applications. This IP core excels in scenarios requiring compact size without compromising security, starting from less than 8,000 gates and featuring a fully self-contained design that excludes the need for external memory. This, combined with its flow-through architecture, enhances its simplicity in integration and operation. Available in source code and netlist forms, the core also supports both encryption and decryption-only variants, further offering flexibility to meet varied design needs. Applications include secure key management systems complying with strict security protocols.
802.11 LDPC offers a highly efficient solution for wireless communication systems, ensuring high throughput and dynamic configuration. The design allows frame-to-frame configuration, optimizing the trade-off between throughput and error correction performance. Meeting stringent bit-error-rate and packet-error-rate specifications, this technology is ideal for robust communication systems requiring reliable data transmission.
The Securyzr iSSP, or Integrated Security Services Platform, provides a comprehensive security solution for devices throughout their lifecycle. It enables zero-touch security lifecycle services, including provisioning, firmware updates, security monitoring, and device identity management. The platform integrates Secure-IC's Root of Trust, ensuring robust system protection from chip-level threats. By combining strong hardware and software security measures, it ensures end-to-end protection for devices operating in various environments.
The AES Core by Green IP Core is designed for robust encryption standards in digital systems. This core provides advanced encryption standard (AES) operations, implementing secure encryption and decryption processes crucial for protecting sensitive information in today's digital age. With its efficient design, the AES Core ensures data security across various applications, including communications and financial systems. Engineered for flexibility, this core is compatible with a variety of bus systems and interfaces, allowing seamless integration with existing infrastructure. The AES Core can be synthesized across different FPGA platforms, making it an ideal choice for organizations that need reliable encryption solutions adaptable to diverse hardware configurations. Its versatility and compliance with established encryption standards make the AES Core a valuable asset for industries that demand high security. Whether dealing with sensitive data exchanges or protecting intellectual property, the AES Core provides an effective measure against unauthorized access and cyber threats.
The Cramium Personal Hardware Security Module (PHSM) by CrossBar is a cutting-edge security solution designed to enhance the protection and management of digital assets within the crypto industry. Combining microcontroller technology with secure elements, Cramium PHSM delivers a robust security framework that outperforms traditional measures. The module is engineered to offer top-tier tamper-resistance, ensuring that sensitive keys and cryptographic data remain secure against physical and logical threats. Cramium PHSM is pivotal in redefining industry standards by integrating advanced protection mechanisms that cater specifically to the fast-evolving demands of cryptocurrency and blockchain applications. Its architecture is designed for adaptability and high performance, ensuring seamless integration into various systems and promoting secure, decentralized operations. Moreover, CrossBar is committed to providing open-source solutions that foster transparency and reliability in the digital asset space. The PHSM not only bolsters security but also enhances trust, thereby supporting open collaboration and innovation within the industry. By focusing on delivering secure and flexible solutions, the Cramium PHSM is set to play a crucial role in safeguarding digital assets and ensuring the integrity of next-generation secure computing systems. Overall, Cramium PHSM exemplifies CrossBar's forward-thinking approach in addressing the cybersecurity needs of modern technologies, reaffirming their position as leaders in secure memory component design. It supports global security standards, making it indispensable for developers and companies aiming to fortify their digital infrastructure against emerging cyber threats.
The Alcora V-by-One HS FMC daughter card is expertly crafted to bring the high-speed V-by-One HS interface technology to FPGA platforms. This card connects seamlessly to FPGA boards using high-speed transceiver lanes, facilitating video resolutions that reach up to 4K at 120Hz or 8K at 30Hz. Featuring both 51-pin and 41-pin header options, Alcora provides developers with versatile integration capabilities. Its dual clock generators play a crucial role in synthesizing precise transceiver reference clocks while minimizing RX clock jitter, which is pivotal for maintaining video quality and signal integrity. Developed by THine Electronics, V-by-One HS is renowned for its ability to support high-resolution, high-frame-rate video transmission in flat panel displays. This technology's inclusion in Alcora ensures that it meets the rigorous demands of modern video applications, making it a perfect addition for those developing next-generation display solutions.
Post-Quantum Cryptography Processing Engine Adds support for lattice-based cryptographic operations such as ML-KEM and ML-DSA. PQPlatform-Lattice provides post-quantum support for these NIST-standardized algorithms with minimal area, and leverages an existing SHA-3 accelerator, powered by PQShield-supplied firmware. It’s designed for minimal area, and maximum compatibility, and is deployed with optional firmware-backed side-channel resistance.
The FortiPKA-RISC-V is a highly specialized Public Key Algorithm coprocessor designed to streamline cryptographic operations by integrating modular multiplication with protections against side-channel and fault injection threats. It operates without the need for Montgomery domain transformations, optimizing the coprocessor’s performance while reducing area requirements. Tailored for applications demanding high efficiency and security, FortiPKA-RISC-V ensures robust performance in public key operations, suitable for secure communications and data protection scenarios. With a focus on reduced latency and power efficiency, this coprocessor can be implemented in various platforms, enhancing protection in devices and systems The coprocessor is part of FortifyIQ's line of advanced IP solutions, providing a technology-agnostic approach that is adaptable to diverse environments. The FortiPKA-RISC-V offers benefits in applications requiring stringent security and efficiency, making it an ideal solution for developers looking to enhance cryptographic functionalities.
Post-Quantum Security Subsystem A cryptographic subsystem, designed to provide cryptographic services. These services include post-quantum signature generation, verification, and secure key establishment. PQPlatform-SubSys uses its built-in CPU independently from the surrounding system, allowing cryptographic services to be offloaded efficiently from the system processor.
Helion Technology's AES-XTS solution offers state-of-the-art encryption for data-at-rest in storage systems, adept at mitigating threats such as copy-paste and dictionary attacks. AES-XTS operates by encrypting disk sector data with blocks of 16-bytes under a secret AES key, incorporating a modifier value corresponding to each block's logical disk location. This method ensures that identical plaintext sectors stored at different positions yield different encrypted outputs. Designed to handle high performance requirements, Helion's AES-XTS cores enable custom levels of throughput scaling from 1Gbps up to over 64Gbps, suitable for diverse scenarios like servers and high-speed SSDs. The product range includes single, twin, quad, and giga variants, aligning closely with specific performance and logic resource parameters, optimizing both hardware usage and security efficacy. This flexibility and adherence to the IEEE 1619 standard make Helion's AES-XTS cores valuable for any application demanding secure disk-level encryption. Available for either ASIC or FPGA platforms, these cores are constructed to leverage the unique capabilities of each technology, achieving the best possible performance across different use cases.
SystemBIST is an advanced product offering from Intellitech that provides a plug-and-play solution for flexible FPGA configuration and embedded JTAG testing. It stands out with its proprietary architecture that allows for efficient, codeless configuration of field-programmable gate arrays (FPGAs) as well as built-in system testing capabilities. SystemBIST is designed to be vendor-neutral, supporting any FPGA or CPLD compliant with the IEEE 1532 or IEEE 1149.1 standards. This design enables robust anti-tamper measures and enhances system reliability by embedding JTAG test patterns directly into PCBs.
AndeSoft SW Stack encompasses a comprehensive set of software building blocks and middleware optimized for AndesCore processors. This rich collection includes operating systems, libraries, drivers, and middleware components, all meticulously designed to enhance software development speed and quality. By providing ready-to-use components, AndeSoft enables developers to focus on crafting their application-specific solutions, significantly reducing time-to-market. Its seamless integration with AndeSight IDE further enhances development efficiency, supporting diverse operating systems and being adaptable to various processor configurations for optimal performance.
Tailored specifically for AI and machine learning requirements at the edge, the SiFive Intelligence X280 brings powerful capabilities to data-intensive applications. This processor line is part of the high-performance AI data flow processors from SiFive, designed to offer scalable vector computation capabilities. Key features include handling demanding AI workloads, efficient data flow management, and enhanced object detection and speech recognition processing. The X280 is equipped with vector processing capabilities that include a 512-bit vector length, single vector ALU VCIX (1024-bit), plus a host of new instructions optimized for machine learning operations. These features provide a robust platform for addressing energy-efficient inference tasks, driven by the need for high-performance yet low-power computing solutions. Key to the X280's appeal is its ability to interface seamlessly with popular machine learning frameworks, enabling developers to deploy models with ease and flexibility. Additionally, its compatibility with SiFive Intelligence Extensions and TensorFlow Lite enhances its utility in delivering consistent, high-quality AI processing in various applications, from automotive to consumer devices.
Post-quantum Software Development Kit Provides easy-to-use software implementations of both post-quantum and classical cryptographic primitives. It’s designed with prototyping and experimentation in mind, consisting of an integration of PQShield’s PQCryptoLib library with two popular high-level cryptography libraries: OpenSSL and mbedTLS. OpenSSL: a widely-adopted secure-communication library mbedTLS: primarily intended for use in embedded system and IoT deployments
The ONNC Calibrator is engineered to ensure high precision in AI System-on-Chips using post-training quantization (PTQ) techniques. This tool enables architecture-aware quantization, which helps maintain 99.99% precision even with fixed-point architecture, such as INT8. Designed for diverse heterogeneous multicore setups, it supports multiple engines within a single chip architecture and employs rich entropy calculation techniques. A major advantage of the ONNC Calibrator is its efficiency; it significantly reduces the time required for quantization, taking only seconds to process standard computer vision models. Unlike re-training methods, PTQ is non-intrusive, maintains network topology, and adapts based on input distribution to provide quick and precise quantization suitable for modern neural network frameworks such as ONNX and TensorFlow. Furthermore, the Calibrator's internal precision simulator uses hardware control registers to maintain precision, demonstrating less than 1% precision drop in most computer vision models. It adapts flexibly to various hardware through its architecture-aware algorithms, making it a powerful tool for maintaining the high performance of AI systems.
The Yuzhen 600 RFID Chip embodies T-Head's expertise in developing ultra-efficient integrated circuits tailored for RFID applications, where low-power and high-performance standards are paramount. This chip is engineered to streamline RFID processes, ensuring swift and accurate reading and writing of tags even in dense environments. By adopting compact design principles, the Yuzhen 600 minimizes energy consumption while maximizing throughput speeds, ensuring extended operational life for applications in supply chain management and logistics. Equipped with sophisticated RF processing capabilities, the chip supports various RFID standards, making it versatile for global applications. Its robust design guarantees resilient performance under diverse environmental conditions, thereby enhancing reliability in critical operations. This adaptability extends to encryption features, ensuring data security and integrity during transactions and data exchanges. T-Head's Yuzhen 600 is optimized for integration into a wide range of applications, from retail inventory management to industrial asset tracking, offering businesses a dependable tool to enhance operational efficiency and reduce costs. Its presence in T-Head's diverse product portfolio highlights a commitment to advancing connected technologies.
Crypto Quantique’s Quantum Resistant Encryption Core offers a robust solution for post-quantum cryptography challenges. This core is designed to withstand potential vulnerabilities that arise with quantum computing technology. It leverages advanced quantum-driven technology to create secure cryptographic keys that are resistant to traditional and quantum-based attacks. It is aimed at providing a future-proof security framework for next-generation electronic devices. The product ensures data integrity and confidentiality, crucial for applications where data breaches could have severe consequences. With a strong emphasis on secure key storage and management, the Quantum Resistant Encryption Core is ideal for industries needing enhanced security measures, such as finance, healthcare, and government sectors. Additionally, this encryption core supports scalable and efficient deployment across various IoT devices. Its compatibility with existing cryptographic systems ensures that companies can integrate it into their current infrastructure without significant overhauls, enabling seamless transitions to quantum-secure communications.
WiseEye2 AI Solution by Himax revolutionizes edge computing in AI applications with its unique blend of an ultralow power CMOS image sensor and the HX6538 AI microcontroller. This solution is specifically engineered for battery-powered applications that require continuous operation, yet consume minimal power. The HX6538 microcontroller boasts unmatched power efficiency and performance gains, driven by its ARM-based architecture sporting Cortex M55 CPU and Ethos U55 NPU. This enables highly complex and accurate AI computations to be made directly at the endpoint, without exorbitant power usage.<br> <br> In terms of security and functionality, the WiseEye2 incorporates sophisticated cryptography engines and a layered power management system. These features ensure the solution not only processes data efficiently but also safeguards sensitive information. Its prowess in executing intricate AI models and seamless sensor fusion makes it an ideal player in the AIoT landscape, powering intelligent devices across various verticals from smart home solutions to advanced security systems.<br> <br> Himax's WiseEye2 thus extends its capabilities beyond typical AI solutions, facilitating continuous, real-time processing that is both resource-conservative and remarkably thorough. This blend of low-energy operation with high computational capability positions WiseEye2 as a frontline solution in the push towards smarter, more secure IoT ecosystems.
Cyclic Design's G13 and G13X IPs are crafted for 512-byte correction blocks, suited for NAND devices with 2KB and 4KB pages. Transitioning from traditional single bit correction using Hamming codes, these IPs support higher bit corrections essential as NAND technologies advance. The G13 IP offers a modular, customizable drop-in upgrade enhancing existing controller architectures with minimal investment, ensuring compatibility with both existing hardware and software.
The DSHA2-256 co-processor is adept at boosting the SHA2-256 hash function's execution, following the FIPS PUB 180-4 compliance. Designed to handle rigorous data integrity and authentication tasks, it supports HMAC natively and accommodates SHA2 hashing in both 224 and 256-bit modes. This cryptographic part seamlessly interfaces with APB, AHB, and AXI buses, ensuring versatility across platforms. By enhancing data security protocols such as digital signatures, this co-processor plays a critical role in safeguarding modern digital communications.
The G15 IP is optimized for 2KB blocks, enhancing NAND controllers with a support system for higher ECC levels, simple integration across a variety of applications, and scalability for future technologies. Capable of reducing development costs while allowing customers to modify the source to fit specific requirements, it integrates seamlessly into established designs while also offering advanced ECC options.
The Securyzr Key Management System provides a robust framework for managing cryptographic keys within embedded systems. By ensuring secure storage, key generation, and access protocols, it strengthens the cryptographic foundation of devices. This system supports multiple security applications and meets stringent certification requirements, ensuring that key information remains protected throughout the device lifecycle. It enhances security by preventing unauthorized access and preserving data integrity through effective key management strategies.
PUFcc is an advanced crypto coprocessor that combines a Hardware Root of Trust with a comprehensive set of cryptographic algorithms, creating a versatile security module suitable for a wide range of system architectures. This turnkey solution enables seamless integration of security protocols into existing systems, making it a critical component in industries such as IoT, AI, automotive, and fintech. It establishes a secure foundation for device security, complementing existing software solutions by providing deep hardware-level protection from design to deployment. The PUFcc integrates a NIST CAVP-certified crypto accelerator, along with OSCCA-compliant ciphers and key derivation algorithms. It features advanced components like the APB and AXI interfaces, facilitating rapid memory access, and a sequencer to eliminate the need for additional processors or boot ROMs. The coprocessor also offers capabilities for extending protection to external flash memory, ensuring secure handling of sensitive data across its lifecycle. With over-the-air secure boot, TLS support, and robust key management possibilities, PUFcc simplifies and strengthens SoC design while providing a secure boundary to protect against threats like cloning and unauthorized access. Its scalable and customizable nature, exemplified by the addition of the PUFcc7 model, allows it to adapt to evolving security requirements, making it an indispensable tool for developers and manufacturers focused on robust cybersecurity infrastructures.
The MACSEC Core provides an essential building block for implementing Ethernet data security, supporting protocols crucial for protecting data at the MAC layer in network infrastructure. It ensures confidentiality and integrity of the communications, making it invaluable for environments where data transmission security is paramount. A vital tool for network security, the MACSEC Core integrates seamlessly into various network processors, offering robust security for both small-scale and extensive network architectures. It stands out for its efficiency in encrypting and authenticating Ethernet packets, ensuring data remains protected from eavesdropping and unauthorized access. Designed for versatile network applications, the MACSEC Core can easily adapt to existing network configurations, enabling quick deployment and teeming with existing systems, thereby enhancing overall network security without extensive reconfigurations.
Helion Technology delivers efficient hashing solutions through their SHA family of products, including SHA-1 and the more secure SHA-2 family, as well as MD5 for legacy purposes. These hashing cores are implemented to transform arbitrary-length files or messages into unique, fixed-length digests, which act as veritable signatures of the original data. These secure hash algorithms (SHAs) are integral to digital signatures and message authentication applications, underpinning protocols like IPsec and TLS/SSL by ensuring integrity and authenticity. With configurations optimized for high-speed and low-area applications, Helion's hashing solutions prove effective in systems needing cryptographic checks. The cores are partitioned into the FAST and TINY controls, each catering to different throughput and resource trade-offs. FAST delivers performance up to 4Gbps, focusing on speed, while TINY configurations are geared towards minimal resource utilization, providing an ideal solution for energy-efficient, low-data rate needs in both FPGA and ASIC technologies.
Helion Technology offers industry-standard AES solutions effective for high data security applications across various industries. Their AES cores, used globally in commercial developments, can perform encryption and decryption using 128-bit, 192-bit, or 256-bit keys, depending on the intended security level. These cores cater to needs ranging from ultra-low area usage and data rates to top-tier multi-gigabit applications. Helion’s AES cores are distinguished by their ability to deliver performance close to that of ASICs when programmed into FPGAs like those from Xilinx, Altera, Microsemi, and Lattice. Clients have access to a series of AES engine families that cover an array of requirements from ultra-low size to very high-speed executions. The cores are designed to seamlessly integrate into any design, emphasizing user-friendliness and flexibility. They cater to multiple modes, such as CBC, CFB, CTR, and others, with validated solutions for applications needing hardware acceleration of the basic AES algorithm. This portfolio further extends to specialized configurations for advanced applications like AES-CCM, AES-GCM, and those needing key wrapping or supporting communication protocols like IPsec and SSL.
Post-Quantum Cryptography Processor PQPlatform-CoPro (PQP-HW-COP) adds PQShield’s state-of-the-art post-quantum cryptography (PQC) to your security sub-system, with optional side-channel countermeasures (SCA). PQPlatform-CoPro can be optimized for minimum area as part of an existing security sub-system. PQPlatform-CoPro is designed to be run by an existing CPU in your security system, using PQShield’s supplied firmware.
The G14 and G14X IP series optimizes for 1KB correction blocks, designed to transition with MLC flash using 8KB page sizes. The IP supports both current MLC needs and future SLC requirements, providing a bridge as technologies shift. Offering flexibility in block size from 2 to 1800 bytes and customizable for latency and bandwidth needs, this IP ensures robust error correction including ECC4 and ECC8, vital for leveraging new SLC flash generations.
AES-GCM is an innovative authenticated encryption technique, employing universal hashing in a binary Galois field to secure data with concurrent privacy and authentication. Known for enabling very high data rates thanks to pipeline and parallel processing efficiencies, AES-GCM is used in a variety of networking and storage applications. This method is recognized by several standards, including MACsec and ANSI Fibre Channel protocols, offering unmatched data protection across high-speed environments. Helion's AES-GCM offerings span throughput requirements from modest 50Mbps to beyond 40Gbps, accommodating diverse performance and area constraints without sacrificing efficiency. These cores are meticulously optimized for major target technologies like Altera, Microsemi, and Xilinx FPGAs, as well as ASIC implementations, ensuring compatibility and high performance across platforms. Each AES-GCM version is tweaked for particular throughput needs while maintaining a compact logic footprint, reflecting Helion's engineering precision and quality. Whether for low or ultra-high bandwidth demands, Helion's solutions present robust encryption capabilities, underscored by ease of integration and operation benefits.
The Customizable Cryptography Accelerator from ResQuant is specifically designed to cater to unique client needs, with a variety of configurable options ensuring peak quantum-safe security. It is designed for seamless integration and supports all NIST PQC standards, including algorithms such as Dilithium, Kyber, XMSS, and Sphinx+. The accelerator is adaptable, allowing extensions by other algorithms and customer-specific requirements. This flexibility, combined with resilience against various side-channel attacks like Differential Power Analysis (DPA) and Timing, makes it a robust choice for secure implementations. The accelerator is further enhanced by its readiness for AXI 4 integration, positioning it well for incorporation into modern system designs. This makes it an efficient and future-proof solution for entities looking to adopt quantum-resistant security measures. Cost-effectiveness, coupled with superior security features, positions ResQuant's solution as a prime candidate for industries looking to shield their operations against future quantum threats. Their workshop offerings empower organizations, providing insights into quantum computing threats and strategies for transitioning to post-quantum cryptography. Participants gain an understanding of how to reinforce their infrastructure to withstand emerging quantum challenges, setting a foundation for proactive, quantum-safe security strategies moving forward.
The AES Core by Algotronix is a sophisticated solution tailored for securing data using advanced encryption methods. This core supports various encryption modes such as ECB, CBC, CTR, CFB, OFB, CCM, GCM, and XTS, which cater to a wide array of applications requiring different levels and methods of data protection. The flexibility in supported modes allows for tailored implementations in different security-critical environments. This encryption core is known for its deployment among prominent defense electronics organizations, and it has been operational within several NATO member states, testifying to its high-level security assurance and operational readiness in sensitive global contexts. Offered typically in source code form, the AES Core ensures that users can perform thorough security audits and tailor enhancements specific to their security policies and infrastructural needs. This capability positions Algotronix's offering as an optimal choice for organizations prioritizing stringent security postures.
Ocean Logic's AES Encryption Core represents a robust and reliable solution for securing data across numerous platforms. Renowned for its certification and extensive validation in silicon on both FPGA and ASIC, this IP core has established credibility and trust among a diversified customer base. The AES core has seen nearly 60 successful implementations, underlining its reliability in providing robust data security. This encryption core complies with stringent security standards, ensuring data integrity and confidentiality. It is subject to Australia's Export Control regulations, qualifying it for international deployment across numerous key markets worldwide. Such widespread recognition indicates its versatility and adaptability to meet various encryption needs. For businesses and organizations prioritizing data security, Ocean Logic's AES Encryption Core offers a proven, high-performance solution. Its design facilitates seamless integration into existing systems, providing a comprehensive encryption capability while maintaining operational efficiency. The IP core stands as an ideal choice for companies looking to fortify their security measures with a trusted, efficient, and scalable encryption architecture.
ResQuant's Individual IP Core Modules offer a plethora of options, each embedded with comprehensive NIST post-quantum cryptography standards. The selection includes powerful algorithms such as Dilithium, Kyber, XMSS, and SPHINCS+, alongside AES modes like ECB, CBC, and GCM, and secure hash functions like SHA2 and SHA3 families. These modules are crafted to fortify various systems with cutting-edge security mechanisms, ensuring data integrity and confidentiality. The flexibility of these IP Core Modules makes them incredibly beneficial for environments that require enhanced encryption and protection against quantum-level threats. Their design supports versatile applications, catering to tailored needs across different industry verticals, ensuring robust security solutions that align with future-proofing strategies. ResQuant's expertise shines through in these modules, highlighted by their inclusion of cryptographic protocols well-suited to counteract quantum computing challenges. Emphasizing scalability and adaptability, these IP Core Modules serve as key components for industries like IoT, automotive, military, and communications, which demand higher security affordances to safeguard critical operations and data from evolving threats.
PhantomBlu serves as Blu Wireless's sophisticated mmWave solution for defense and military operations. It offers advanced tactical connectivity between vehicles and platforms whether on land, air, or sea. The system is designed to support high-performance applications and provides secure, mobile IP networking via a tactical, anti-jam resistant mesh network. PhantomBlu delivers superior data handover capabilities, ensuring low probability of interception and detection, essential for critical military communications. This system is crafted to be highly scalable and customizable, making it suitable for diverse defense needs, from securing critical infrastructure to enhancing vehicular and airborne communication capabilities. Its design supports a range of operational environments and provides robust communications over expansive areas, utilizing innovative integration with electronic warfare systems and cyberspace operations. PhantomBlu elevates defense communications by eliminating dependency on fixed infrastructure such as fiber optics, ensuring rapid setup and high resilience. PhantomBlu integrates advanced networking capabilities that rival and surpass conventional fiber optics, offering a flexible, high-bandwidth system perfectly aligned with modern C4ISR needs. The platform supports long-range connections and boasts rigorous encryption to safeguard tactical data. Its mesh network is tailor-made for interoperability, facilitating cross-domain data sharing efficiently. PhantomBlu embodies the future of military communications, offering dynamic scalability and thrilling operational advantages for defense forces worldwide.
FortifyIQ's Side-channel Attack Resistance offers advanced security solutions designed to protect devices against SCA vulnerabilities during the early design stages. By enabling integrated simulations of side-channel scenarios, it supports identifying and mitigating potential weaknesses before hardware manufacturing. This capacity ensures cost-effective and timely preventative measures that preempt costly post-production fixes. Integrating advanced testing methodologies such as the rigorous Test Vector Leakage Assessment (TVLA), FortifyIQ’s SCA solution allows comprehensive assessment and validation of security under extreme scenarios. The technology successfully detects fault injection risks, ensuring the highest standards of security compliance are met. This system is particularly vital for sectors where data integrity and security are paramount, including automotive, defense, and Internet of Things (IoT). Its extensive simulation and analysis capabilities allow users to optimize systems efficiently, ensuring safe deployment and continuous protection of sensitive data against evolving security challenges.
The FPGA Lock Core is an innovative FPGA solution designed to secure FPGAs and hardware against unauthorized access and counterfeiting, leveraging a Microchip ATSHA204A crypto authentication IC. It reads a unique ID, generates a 256-bit challenge, and uses secure hashing to verify the hardware's authenticity, ensuring hardware integrity in sensitive applications like military and medical fields. This solution allows hardware protection against IP theft by enforcing authentication and disables FPGA functionality if unauthorized access is detected. The core utilizes minimal logic resources and one FPGA pin, communicating through a bidirectional open drain link. The clarity of this system is enhanced by providing the core in VHDL, allowing users to thoroughly understand its functionality, supported by example designs on Cyclone10 and Artix 7 boards, catering to both Intel and Xilinx FPGA platforms. Complementing this security measure is the Key Writer Core, which allows programming of custom secret keys into the ATSHA204A in situ on assembled boards, ensuring a seamless integration with the FPGA Lock system. Available for various FPGA platforms, the Efinix version, distributed with TRS Star, expands its applicability, with webinars and user guides offering in-depth implementation insights.
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