All IPs > Interface Controller & PHY > RapidIO > DisplayPort Receiver
Trilinear's DisplayPort Receiver core adheres to the VESA DisplayPort 1.4 standard, offering superior performance for receiving high-definition video streams. This core is engineered to support an extensive PHY interface range, ensuring easy deployment in both FPGA and ASIC applications. With its flexible design, it provides excellent compatibility across multiple silicon process nodes, catering to a variety of technical demands.
| Foundry | Process Nodes |
|---|---|
| TSMC |
14nm 55nm 65nm |
| Class | Value |
|---|---|
| Categories |
Interface Controller & PHY > RapidIO Graphic & Peripheral > Input/Output Controller Interface Controller & PHY > USB Interface Controller & PHY > PowerPC Interface Controller & PHY > PCI Interface Controller & PHY > SATA |
| Availability | All Countries & Regions |
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