All IPs > Memory Controller & PHY > DDR > DDR5 Temperature Sensor Target Interface IP
The TS5111 and TS5110 device incorporate thermal sensing capability which is controlled and read over two wire bus. These device operate on I2C and I3C two wire serial bus interface. The TS5 designed for Memory Module Applications. The TS5 device intended to operate up to 12.5 MHz on a I3C Basic Bus or up to 1 MHz on a I2C Bus.
All TS5 devices respond to specific pre-defined device select code on the I2C/I3C Bus
Note: JESD302-1A and also we have JESD302-1
| Class | Value |
|---|---|
| Categories |
Memory Controller & PHY > DDR |
| Compliant Standard | JESD302-1A |
| Maturity | Silicon Proven |
| FPGA | FPGA Env with CMOD and Arty A7 Board |
| Availability | US, Canada, UK & EU Only |
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