The CVC Verilog Simulator from Tachyon Design Automation is a comprehensive solution for simulating electronic hardware models following the IEEE 1364 2005 Verilog HDL standard. This simulator distinguishes itself by compiling Verilog into native X86_64 machine instructions, allowing for rapid execution as a simple Linux binary. It supports both compiled and interpreted simulation modes, enabling efficient elaboration of designs and quick iteration cycles during the design phase.
The simulator boasts a large gate and RTL capacity, enhanced by its 64-bit support which enables faster simulations compared to traditional 32-bit systems. To further augment its high speed, CVC integrates features like toggle coverage with per-instance and tick period controls. These allow designers to maintain oversight over signal changes and states throughout the simulation process.
Additionally, CVC provides robust support for various interfaces and simulation techniques, including full PLI (programming language interfaces) and DPI (direct programming interface) support, ensuring seamless integration and high-speed interaction with external C/C++ applications. This simulator also supports various design state dump formats which enhance compatibility with GTKWave, a common tool used for waveform viewing.
