The BlueLynx Chiplet Interconnect is an adaptive interconnect solution, offering both physical (PHY) and link layer interfaces that support industry standards such as Universal Chiplet Interconnect Express (UCIe) and Open Compute Project Bunch of Wires (BoW). This IP is engineered for seamless integration with network-on-chip systems, leveraging various established standards like AMBA CHI, AXI, and ACE to provide efficient die-to-die subsystem solutions.
The advanced customizable architecture of BlueLynx ensures that users can tailor the IP to specific bandwidth and physical requirements, optimizing power-performance-area (PPA) metrics across applications. With compatibility spanning nodes from 16nm, 12nm, 7nm, to as advanced as 3nm and multi-foundry support, this IP is highly adaptable to various packaging needs, whether low-cost or advanced.
Incorporating high data rates from 2 Gb/s to above 24 Gb/s, the BlueLynx boasts very low power consumption and latency, achieved through < 0.375 pJ/bit energy efficiency and < 2 ns latency. It includes innovative features like staggered bump pitch options, integrated DLL with duty-cycle correction, and built-in self-test mechanisms, making it a robust choice for high-performance computing, AI, and mobile applications.
