Avispado is a 64-bit in-order RISC-V processor core engineered for efficiency and versatility within energy-conscious systems. This core supports a 2-wide in-order pipeline, which allows for streamlined instruction decoding and execution. Its compact design fits well in SOCs aimed at machine learning markets where power and space efficiency are crucial yet it retains the capacity to handle demanding processing tasks.
With the inclusion of Gazzillion Misses™ technology, Avispado can handle high sparseness in data effectively, particularly beneficial in machine learning workloads. The core's full compatibility with RISC-V vector specifications and open vector interfaces offers flexibility in deploying various vector solutions, reducing the energy demanded by operations.
Avispado is multiprocessor-ready and supports cache-coherent environments, ensuring it can be scaled as operations demand, from minimal cores up to comprehensive systems. It is suitable for applications looking to leverage high throughput with minimized silicon investments, making it a favorable choice for efficiently deploying machine learning and recommendation system support.