M31's Analog Phase-Locked Loop (PLL) IP is a versatile frequency synthesizer featuring a broad input reference range between 10 and 240 MHz, with an output scaling from 1.5 to 3.0 GHz. Designed with a Type-II architecture utilizing a sigma delta modulator for fractional frequency adjustments, this PLL achieves notable power supply noise rejection, crucial for operating within noisy SoC environments. Its streamlined integration approach eliminates complex configurations, providing a no-fuss solution for applications needing robust frequency control. This IP offers wide compatibility and flexibility for deployment in a multitude of consumer and industrial electronic applications.
