The agileCMP programmable threshold comparator features a user-selectable (enable/disable) hysteresis as well as programmable threshold with 10mV step size, a latched output as well as an active (unlatched) output. With a focus on long battery life, the agileCMP can be used to monitor external analog signals and enable wake-up events as is essential in many modern SoCs. The agileCMP programmable threshold comparator is ideally suited for interrupt generation in application areas such as HPC, IoT, security, automotive and AI.
Agile Analog designs are based on tried and tested architectures to ensure reliability and functionality. Our automated design methodology is programmatic, systematic and repeatable leading to analog IP that is more verifiable, more robust and more reliable. Our methodology also allows us to quickly re-target our IP to different process options. Our highly configurable and multi-node analog IP products are developed to meet the customer’s exact requirements. These digitally-wrapped and verified solutions can be seamlessly integrated into any SoC, significantly reducing complexity, time and costs.
